From 33a3a00f01fddc0cf3a4932666730ec2882d9ead Mon Sep 17 00:00:00 2001
From: "Spencer E. Olson" <olsonse@umich.edu>
Date: Fri, 3 Jun 2016 17:29:16 -0600
Subject: [PATCH 04/15] staging: comedi: ni_routing: add ni routing tables
To: devel@driverdev.osuosl.org
Cc: Ian Abbott <abbotti@mev.co.uk>,
    H Hartley Sweeten <hsweeten@visionengravers.com>,
    Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Adds tables of all register values for routing various signals to various
terminals on National Instruments hardware.  This information is directly
compared to and taken from register-level programming documentation and/or
register-level programming examples as provided by National Instruments.

Furthermore, this information was mostly compared (favorably) to the
register values already used in the comedi drivers for NI hardware.

Adds tables of valid routes for many devices.  This information is not
consistent from device to device, nor entirely consistent within device
families.  One additional major challenge is that this information does not
seem to be obtainable in any programmatic fashion, neither through the
proprietary NIDAQmx(-base) c-libraries, nor with register level
programming, _nor_ through any documentation.  In fact, the only consistent
source of this information is through the proprietary NI-MAX software,
which currently only runs on Windows platforms.  A further challenge is
that this information cannot be exported from NI-MAX, except by screenshot.

As described in ni_routing/README and as provided by this commit, the
device route information is primarily stored in a spreadsheet so-as to
enhance the ability to compare to screenshots obtained of NI-MAX.  This
commit provides the ability to parse the spreadsheets and generate
code following kernel conventions.

Signed-off-by: Spencer E. Olson <olsonse@umich.edu>
---
 .../staging/comedi/drivers/ni_routing/.gitignore   |     3 +
 drivers/staging/comedi/drivers/ni_routing/Makefile |    40 +
 .../comedi/drivers/ni_routing/extract_tables.py    |   259 +
 .../comedi/drivers/ni_routing/ni_device_routes.c   | 20251 +++++++++++++++++++
 .../comedi/drivers/ni_routing/ni_route_values.c    |  2724 +++
 5 files changed, 23277 insertions(+)
 create mode 100644 drivers/staging/comedi/drivers/ni_routing/.gitignore
 create mode 100644 drivers/staging/comedi/drivers/ni_routing/Makefile
 create mode 100755 drivers/staging/comedi/drivers/ni_routing/extract_tables.py
 create mode 100644 drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c
 create mode 100644 drivers/staging/comedi/drivers/ni_routing/ni_route_values.c

diff --git a/drivers/staging/comedi/drivers/ni_routing/.gitignore b/drivers/staging/comedi/drivers/ni_routing/.gitignore
new file mode 100644
index 0000000..8b7530547
--- /dev/null
+++ b/drivers/staging/comedi/drivers/ni_routing/.gitignore
@@ -0,0 +1,3 @@
+comedi_h.py
+comedi_h.pyc
+*.pyc
diff --git a/drivers/staging/comedi/drivers/ni_routing/Makefile b/drivers/staging/comedi/drivers/ni_routing/Makefile
new file mode 100644
index 0000000..407f3b7
--- /dev/null
+++ b/drivers/staging/comedi/drivers/ni_routing/Makefile
@@ -0,0 +1,40 @@
+# this make file is simply to help autogenerate these files:
+# 	ni_route_values.h
+#	ni_device_routes.h
+# in order to do this, we are also generating a python representation (using
+# ctypesgen) of ../../comedi.h.
+# This allows us to sort NI signal/terminal names numerically to use a binary
+# search through the device_routes tables to find valid routes.
+
+ALL:  ni_route_values.c ni_device_routes.c
+
+CPPFLAGS=-D"BIT(x)=(1UL<<(x))" -D__user=
+
+comedi_h.py : ../../comedi.h
+	ctypesgen.py $< --include "sys/ioctl.h" --cpp 'gcc -E $(CPPFLAGS)' -o $@
+
+ROUTE_VALUES_CSV=$(wildcard ni_route_values/*.csv)
+DEVICE_ROUTES_CSV=$(wildcard ni_device_routes/*.csv)
+
+ni_route_values.c : $(ROUTE_VALUES_CSV) comedi_h.py extract_tables.py
+	./extract_tables.py  --route_values
+
+ni_device_routes.c : $(DEVICE_ROUTES_CSV) comedi_h.py extract_tables.py
+	./extract_tables.py  --device_routes
+
+clean :
+	rm -f comedi_h.py comedi_h.pyc
+
+# Note:  One could also use ctypeslib in order to generate these files.  The
+# caveat is that ctypeslib does not do a great job at handling macro functions.
+# The make rules are as follows:
+# comedi.h.xml : ../../comedi.h
+# 	# note that we have to use PWD here to avoid h2xml finding a system
+# 	# installed version of the comedilib/comedi.h file
+# 	h2xml ${PWD}/../../comedi.h -c -D__user="" -D"BIT(x)=(1<<(x))" \
+# 		-o comedi.h.xml
+#
+# comedi_h.py : comedi.h.xml
+# 	xml2py ./comedi.h.xml -o comedi_h.py
+# clean :
+# 	rm -f comedi.h.xml comedi_h.py comedi_h.pyc
diff --git a/drivers/staging/comedi/drivers/ni_routing/extract_tables.py b/drivers/staging/comedi/drivers/ni_routing/extract_tables.py
new file mode 100755
index 0000000..e3db971
--- /dev/null
+++ b/drivers/staging/comedi/drivers/ni_routing/extract_tables.py
@@ -0,0 +1,259 @@
+#!/usr/bin/env python
+# vim: ts=2:sw=2:et:tw=80:nowrap
+
+# This is simply to aide in creating the entries in the order of the value of
+# the device-global NI signal/terminal constants defined in comedi.h
+import comedi_h
+
+
+#### BEGIN CSV FILE READING ####
+import os, csv, glob
+
+class CSVCollection(dict):
+  delimiter=';'
+  quotechar='"'
+  source_column_name = 'Sources / Destinations'
+
+  """
+  This class is a dictionary representation of the collection of sheets that
+  exist in a given .ODS file.
+  """
+  def __init__(self, pattern, skip_commented_lines=True, strip_lines=True):
+    super(CSVCollection, self).__init__()
+    self.pattern = pattern
+    C = '#' if skip_commented_lines else 'blahblahblah'
+
+    if strip_lines:
+      strip = lambda s:s.strip()
+    else:
+      strip = lambda s:s
+
+    # load all CSV files
+    key = self.source_column_name
+    for fname in glob.glob(pattern):
+      with open(fname) as F:
+        dR = csv.DictReader(F, delimiter=self.delimiter,
+                            quotechar=self.quotechar)
+        name = os.path.basename(fname).partition('.')[0]
+        D = {
+          r[key]:{f:strip(c) for f,c in r.iteritems()
+                  if f != key and f[:1] not in ['', C] and
+                     strip(c)[:1] not in ['', C]}
+          for r in dR if r[key][:1] not in ['', C]
+        }
+        # now, go back through and eliminate all empty dictionaries
+        D = {k:v for k,v in D.iteritems() if v}
+        self[name] = D
+#### END CSV FILE READING ####
+
+
+def routedict_to_structinit(name, D, value_fmt='V({})', return_name=False):
+  Locals = dict()
+  lines = [
+		'\t{',
+    '\t\t.family = "{}",'.format(name),
+		'\t\t.register_values = {',
+  ]
+  Lsrc = D.items()
+  Lsrc.sort(key=lambda i: eval(i[0], comedi_h.__dict__, Locals))
+
+  for src, destD in Lsrc:
+    Ldest = destD.items()
+    Ldest.sort(key=lambda i: eval(i[0], comedi_h.__dict__, Locals))
+
+    lines.append('\t\t\t[B({})] = {{'.format(src))
+    for dest, value in Ldest:
+      lines.append('\t\t\t\t[B({})]\t= {},'.format(dest, value_fmt.format(value)))
+    lines.append('\t\t\t},')
+  lines.append('\t\t},')
+  lines.append('\t},')
+
+  lines = '\n'.join(lines)
+  if return_name:
+    return N, lines
+  else:
+    return lines
+
+def routedict_to_routelist(name, D, indent=1):
+  Locals = dict()
+
+  I0 = '\t'*(indent)
+  I1 = '\t'*(indent+1)
+  I2 = '\t'*(indent+2)
+  I3 = '\t'*(indent+3)
+  I4 = '\t'*(indent+4)
+  # Sort by order of device-global names (numerically)
+  Lsrc = D.items()
+  Lsrc.sort(key=lambda i: eval(i[0], comedi_h.__dict__, Locals))
+
+  lines = [ '{}{{\n{}.device = "{}",\n'
+                  '{}.n_route_sets = {},\n'
+                  '{}.routes = (const struct ni_route_set[]){{'
+            .format(I0, I1, name, I1, len(Lsrc), I1) ]
+  for src, destD in Lsrc:
+    Ldest = [ k for k,v in destD.iteritems() if v ]
+    Ldest.sort(key=lambda i: eval(i, comedi_h.__dict__, Locals))
+
+    lines.append('{}{{\n{}.src = {},\n'
+                       '{}.n_dest = {},\n'
+                       '{}.dest = (const int[]){{'
+                 .format(I2, I3, src, I3, len(Ldest), I3)
+    )
+    for dest in Ldest:
+      lines.append( '{}{},'.format(I4, dest) )
+    lines.append(I3 + '}\n' + I2 + '},')
+  lines.append(I1 + '}\n' + I0 + '},')
+
+  return '\n'.join(lines)
+
+
+class DeviceRoutes(CSVCollection):
+  DEVICE_ROUTES_C = 'ni_device_routes.c'
+  output_file_top = """\
+/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
+/*
+ *  comedi/drivers/ni_routing/{filename}
+ *  List of valid routes for specific NI boards.
+
+ *  COMEDI - Linux Control and Measurement Device Interface
+ *  Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu>
+
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+*/
+
+/*
+ * This file is meant to be included by comedi/drivers/ni_routes.c
+ */
+
+/*
+ * *** THIS FILE IS AUTOGENERATED ***
+ */
+
+#include "../../comedi.h"
+#include "../ni_routes.h"
+""".format(filename=DEVICE_ROUTES_C)
+
+  def __init__(self, pattern='ni_device_routes/*.csv'):
+    super(DeviceRoutes,self).__init__(pattern)
+
+  def to_listinit(self):
+    chunks = [ self.output_file_top,
+      'static const struct ni_device_routes device_routes_list[] = {'
+    ]
+    sheets = self.items()
+    # put the sheets in lexical order of device numbers then bus
+    sheets.sort( key=lambda i : tuple(i[0].split('-')[::-1]) )
+
+    for sheet,D in sheets:
+      chunks.append(routedict_to_routelist(sheet.lower(), D))
+    chunks.append('};')
+    return '\n'.join(chunks)
+
+  def save(self, filename=DEVICE_ROUTES_C):
+    f = open(filename,'w')
+    f.write( self.to_listinit() )
+    f.write( '\n' )
+    f.close()
+
+
+class RouteValues(CSVCollection):
+  ROUTE_VALUES_C = 'ni_route_values.c'
+  output_file_top = """\
+/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
+/*
+ *  comedi/drivers/ni_routing/{filename}
+ *  Route information for NI boards.
+
+ *  COMEDI - Linux Control and Measurement Device Interface
+ *  Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu>
+
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+*/
+
+/*
+ * This file includes the tables that are a list of all the values of various
+ * signals routes available on NI hardware.  In many cases, one does not
+ * explicitly make these routes, rather one might indicate that something is
+ * used as the source of one particular trigger or another (using
+ * *_src=TRIG_EXT).
+ *
+ * This file is meant to be included by comedi/drivers/ni_routes.c
+ */
+
+/*
+ * *** THIS FILE IS AUTOGENERATED ***
+ */
+
+#include "../../comedi.h"
+
+#define B(x)	((x) - NI_NAMES_BASE)
+
+#define V(x)	((x) | 0x80)
+
+#define Gi_SRC(val, subsel) ((val) | ((subsel) << 6))
+
+struct family_route_values {{
+	const char * family;
+	const u8 register_values[NI_NUM_NAMES][NI_NUM_NAMES];
+}};
+""" \
+.format(filename = ROUTE_VALUES_C)
+
+  def __init__(self, pattern='ni_route_values/*.csv'):
+    super(RouteValues,self).__init__(pattern)
+
+  def to_structinit(self):
+    chunks = [ self.output_file_top,
+      'static const struct family_route_values all_route_values[] = {'
+    ]
+    sheets = self.items()
+    # put the sheets in lexical order for consistency
+    sheets.sort( key=lambda i : i[0] )
+
+    for sheet,D in sheets:
+      chunks.append( routedict_to_structinit(sheet, D) )
+    chunks.append('};')
+    return '\n'.join(chunks)
+
+  def save(self, filename=ROUTE_VALUES_C):
+    f = open(filename,'w')
+    f.write( self.to_structinit() )
+    f.write( '\n' )
+    f.close()
+
+
+
+if __name__ == '__main__':
+  import argparse
+  parser = argparse.ArgumentParser()
+  parser.add_argument( '--route_values', action='store_true',
+    help='Extract route values from ni_route_values/*.csv' )
+  parser.add_argument( '--device_routes', action='store_true',
+    help='Extract route values from ni_device_routes/*.csv' )
+  args = parser.parse_args()
+  KL = list()
+  if args.route_values:
+    KL.append( RouteValues )
+  if args.device_routes:
+    KL.append( DeviceRoutes )
+  if not KL:
+    parser.error('nothing to do...')
+  for K in KL:
+    doc = K()
+    doc.save()
diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c
new file mode 100644
index 0000000..ae1c6d1
--- /dev/null
+++ b/drivers/staging/comedi/drivers/ni_routing/ni_device_routes.c
@@ -0,0 +1,20251 @@
+/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
+/*
+ *  comedi/drivers/ni_routing/ni_device_routes.c
+ *  List of valid routes for specific NI boards.
+
+ *  COMEDI - Linux Control and Measurement Device Interface
+ *  Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu>
+
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+*/
+
+/*
+ * This file is meant to be included by comedi/drivers/ni_routes.c
+ */
+
+/*
+ * *** THIS FILE IS AUTOGENERATED ***
+ */
+
+#include "../../comedi.h"
+#include "../ni_routes.h"
+
+static const struct ni_device_routes device_routes_list[] = {
+	{
+		.device = "pxi-6030e",
+		.n_route_sets = 38,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 6,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					NI_PFI(8),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					NI_PFI(9),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(4),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 11,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrGate(0),
+					NI_CtrOut(1),
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrOut(0),
+				.n_dest = 6,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 7,
+				.dest = (const int[]){
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 10,
+				.dest = (const int[]){
+					NI_PFI(0),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_PFI(1),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 7,
+				.dest = (const int[]){
+					NI_PFI(2),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 7,
+				.dest = (const int[]){
+					NI_PFI(5),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 7,
+				.dest = (const int[]){
+					NI_PFI(6),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = NI_MasterTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_AIHoldCompleteEvent,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AIHoldComplete,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6070e",
+		.n_route_sets = 39,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 15,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 6,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(8),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(9),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(4),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 12,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrGate(0),
+					NI_CtrOut(1),
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrOut(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_PFI(0),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 10,
+				.dest = (const int[]){
+					NI_PFI(1),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(2),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(5),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(6),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_MasterTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_AIHoldCompleteEvent,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AIHoldComplete,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6220",
+		.n_route_sets = 45,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 32,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 32,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AI_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6221",
+		.n_route_sets = 49,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 31,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AI_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pxi-6224",
+		.n_route_sets = 45,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 32,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 32,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = PXI_Clk10,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 46,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pxi-6225",
+		.n_route_sets = 48,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = PXI_Clk10,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 31,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 50,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6251",
+		.n_route_sets = 50,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 31,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AI_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 50,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pxi-6251",
+		.n_route_sets = 49,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = PXI_Star,
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = PXI_Clk10,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 31,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 50,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pxie-6251",
+		.n_route_sets = 51,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = PXI_Clk10,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 31,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AI_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 50,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6254",
+		.n_route_sets = 46,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 30,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 38,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 32,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 32,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AI_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 46,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6259",
+		.n_route_sets = 50,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 34,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 27,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(1),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 33,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrAux(0),
+					NI_CtrArmStartTrigger(0),
+					NI_AI_SampleClock,
+					NI_AI_StartTrigger,
+					NI_AI_ConvertClock,
+					NI_AO_SampleClock,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_SampleClockTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_AI_SampleClock,
+					NI_AI_ConvertClockTimebase,
+				}
+			},
+			{
+				.src = NI_AI_StartTrigger,
+				.n_dest = 31,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AO_StartTrigger,
+				}
+			},
+			{
+				.src = NI_AI_ReferenceTrigger,
+				.n_dest = 30,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+				}
+			},
+			{
+				.src = NI_AI_ConvertClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AI_ConvertClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AI_ConvertClock,
+				}
+			},
+			{
+				.src = NI_AI_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_AO_PauseTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_DI_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_DO_SampleClock,
+				.n_dest = 16,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AI_ConvertClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AI_SampleClockTimebase,
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_10MHzRefClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+				}
+			},
+			{
+				.src = NI_FrequencyOutput,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_ChangeDetectionEvent,
+				.n_dest = 26,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AnalogComparisonEvent,
+				.n_dest = 50,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrA(0),
+					NI_CtrA(1),
+					NI_CtrB(0),
+					NI_CtrB(1),
+					NI_CtrZ(0),
+					NI_CtrZ(1),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_AI_SampleClock,
+					NI_AI_SampleClockTimebase,
+					NI_AI_StartTrigger,
+					NI_AI_ReferenceTrigger,
+					NI_AI_ConvertClock,
+					NI_AI_PauseTrigger,
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6534",
+		.n_route_sets = 16,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 14,
+				.dest = (const int[]){
+					NI_PFI(0),
+					NI_PFI(1),
+					NI_PFI(2),
+					NI_PFI(3),
+					NI_PFI(4),
+					NI_PFI(5),
+					NI_PFI(6),
+					NI_PFI(7),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 2,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_MasterTimebase,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6602",
+		.n_route_sets = 77,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 41,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 41,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(10),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(11),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(12),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(13),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(14),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(15),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(16),
+				.n_dest = 41,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(17),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(18),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(19),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(20),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(21),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(21),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(22),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(23),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(24),
+				.n_dest = 41,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(25),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(26),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(27),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(28),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(29),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(30),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(31),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(32),
+				.n_dest = 41,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(33),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(34),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(35),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(36),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(37),
+				.n_dest = 42,
+				.dest = (const int[]){
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(36),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(38),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_PFI(39),
+				.n_dest = 43,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 48,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 50,
+				.dest = (const int[]){
+					NI_PFI(7),
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_PFI(39),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(35),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrGate(0),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrSource(2),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(31),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(3),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrSource(3),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(27),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+				}
+			},
+			{
+				.src = NI_CtrSource(4),
+				.n_dest = 20,
+				.dest = (const int[]){
+					NI_PFI(23),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrSource(5),
+				.n_dest = 24,
+				.dest = (const int[]){
+					NI_PFI(19),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(4),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrSource(6),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_PFI(15),
+					NI_PFI(28),
+					NI_PFI(29),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(7),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrSource(7),
+				.n_dest = 22,
+				.dest = (const int[]){
+					NI_PFI(11),
+					NI_PFI(24),
+					NI_PFI(25),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 23,
+				.dest = (const int[]){
+					NI_PFI(36),
+					NI_PFI(37),
+					NI_PFI(38),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 23,
+				.dest = (const int[]){
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(34),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrGate(0),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(2),
+				.n_dest = 23,
+				.dest = (const int[]){
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(30),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(3),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(3),
+				.n_dest = 23,
+				.dest = (const int[]){
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(26),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+				}
+			},
+			{
+				.src = NI_CtrGate(4),
+				.n_dest = 21,
+				.dest = (const int[]){
+					NI_PFI(22),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrGate(5),
+				.n_dest = 21,
+				.dest = (const int[]){
+					NI_PFI(18),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(4),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrGate(6),
+				.n_dest = 21,
+				.dest = (const int[]){
+					NI_PFI(14),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(7),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrGate(7),
+				.n_dest = 23,
+				.dest = (const int[]){
+					NI_PFI(10),
+					NI_PFI(24),
+					NI_PFI(25),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrGate(0),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(2),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(3),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(3),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(3),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(3),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(3),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(4),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(5),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(4),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(6),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(7),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(7),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(7),
+				.n_dest = 35,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_PFI(4),
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_80MHzTimebase,
+				.n_dest = 10,
+				.dest = (const int[]){
+					NI_PFI(2),
+					NI_PFI(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_PFI(3),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+				}
+			},
+			{
+				.src = NI_LogicLow,
+				.n_dest = 61,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(10),
+					NI_PFI(11),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(14),
+					NI_PFI(15),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(18),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(23),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+			{
+				.src = NI_LogicHigh,
+				.n_dest = 55,
+				.dest = (const int[]){
+					NI_PFI(8),
+					NI_PFI(9),
+					NI_PFI(12),
+					NI_PFI(13),
+					NI_PFI(16),
+					NI_PFI(17),
+					NI_PFI(20),
+					NI_PFI(21),
+					NI_PFI(24),
+					NI_PFI(25),
+					NI_PFI(28),
+					NI_PFI(29),
+					NI_PFI(32),
+					NI_PFI(33),
+					NI_PFI(36),
+					NI_PFI(37),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrSource(2),
+					NI_CtrSource(3),
+					NI_CtrSource(4),
+					NI_CtrSource(5),
+					NI_CtrSource(6),
+					NI_CtrSource(7),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrGate(2),
+					NI_CtrGate(3),
+					NI_CtrGate(4),
+					NI_CtrGate(5),
+					NI_CtrGate(6),
+					NI_CtrGate(7),
+					NI_CtrAux(0),
+					NI_CtrAux(1),
+					NI_CtrAux(2),
+					NI_CtrAux(3),
+					NI_CtrAux(4),
+					NI_CtrAux(5),
+					NI_CtrAux(6),
+					NI_CtrAux(7),
+					NI_CtrArmStartTrigger(0),
+					NI_CtrArmStartTrigger(1),
+					NI_CtrArmStartTrigger(2),
+					NI_CtrArmStartTrigger(3),
+					NI_CtrArmStartTrigger(4),
+					NI_CtrArmStartTrigger(5),
+					NI_CtrArmStartTrigger(6),
+					NI_CtrArmStartTrigger(7),
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6713",
+		.n_route_sets = 31,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(8),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(9),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(4),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 9,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrGate(0),
+					NI_CtrOut(1),
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrOut(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(5),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(6),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_MasterTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6723",
+		.n_route_sets = 31,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 9,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(8),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(9),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(4),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 9,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrGate(0),
+					NI_CtrOut(1),
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrOut(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(5),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(6),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_MasterTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+		}
+	},
+	{
+		.device = "pci-6733",
+		.n_route_sets = 31,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(6),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(8),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(9),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(4),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 9,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrGate(0),
+					NI_CtrOut(1),
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrOut(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 10,
+				.dest = (const int[]){
+					NI_PFI(5),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(6),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					TRIGGER_LINE(6),
+				}
+			},
+			{
+				.src = NI_MasterTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+		}
+	},
+	{
+		.device = "pxi-6733",
+		.n_route_sets = 31,
+		.routes = (const struct ni_route_set[]){
+			{
+				.src = NI_PFI(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(1),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(2),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(3),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(4),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(5),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(6),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(7),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(8),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = NI_PFI(9),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(0),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(1),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(2),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(3),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(4),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(5),
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = TRIGGER_LINE(7),
+				.n_dest = 4,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_CtrSource(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(8),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					PXI_Star,
+				}
+			},
+			{
+				.src = NI_CtrSource(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(3),
+				}
+			},
+			{
+				.src = NI_CtrGate(0),
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(9),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					PXI_Star,
+				}
+			},
+			{
+				.src = NI_CtrGate(1),
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_PFI(4),
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(0),
+				.n_dest = 9,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					PXI_Star,
+				}
+			},
+			{
+				.src = NI_CtrInternalOutput(1),
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrGate(0),
+					NI_CtrOut(1),
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_CtrOut(0),
+				.n_dest = 7,
+				.dest = (const int[]){
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					PXI_Star,
+				}
+			},
+			{
+				.src = PXI_Star,
+				.n_dest = 11,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_CtrGate(0),
+					NI_CtrGate(1),
+					NI_CtrOut(0),
+					NI_AO_SampleClock,
+					NI_AO_SampleClockTimebase,
+					NI_AO_StartTrigger,
+					NI_AO_PauseTrigger,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClock,
+				.n_dest = 10,
+				.dest = (const int[]){
+					NI_PFI(5),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					PXI_Star,
+					NI_DI_SampleClock,
+					NI_DO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_SampleClockTimebase,
+				.n_dest = 1,
+				.dest = (const int[]){
+					NI_AO_SampleClock,
+				}
+			},
+			{
+				.src = NI_AO_StartTrigger,
+				.n_dest = 8,
+				.dest = (const int[]){
+					NI_PFI(6),
+					TRIGGER_LINE(0),
+					TRIGGER_LINE(1),
+					TRIGGER_LINE(2),
+					TRIGGER_LINE(3),
+					TRIGGER_LINE(4),
+					TRIGGER_LINE(5),
+					PXI_Star,
+				}
+			},
+			{
+				.src = NI_MasterTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+			{
+				.src = NI_20MHzTimebase,
+				.n_dest = 5,
+				.dest = (const int[]){
+					TRIGGER_LINE(7),
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+					NI_MasterTimebase,
+				}
+			},
+			{
+				.src = NI_100kHzTimebase,
+				.n_dest = 3,
+				.dest = (const int[]){
+					NI_CtrSource(0),
+					NI_CtrSource(1),
+					NI_AO_SampleClockTimebase,
+				}
+			},
+		}
+	},
+};
diff --git a/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c
new file mode 100644
index 0000000..4ac441a
--- /dev/null
+++ b/drivers/staging/comedi/drivers/ni_routing/ni_route_values.c
@@ -0,0 +1,2724 @@
+/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
+/*
+ *  comedi/drivers/ni_routing/ni_route_values.c
+ *  Route information for NI boards.
+
+ *  COMEDI - Linux Control and Measurement Device Interface
+ *  Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu>
+
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+*/
+
+/*
+ * This file includes the tables that are a list of all the values of various
+ * signals routes available on NI hardware.  In many cases, one does not
+ * explicitly make these routes, rather one might indicate that something is
+ * used as the source of one particular trigger or another (using
+ * *_src=TRIG_EXT).
+ *
+ * This file is meant to be included by comedi/drivers/ni_routes.c
+ */
+
+/*
+ * *** THIS FILE IS AUTOGENERATED ***
+ */
+
+#include "../../comedi.h"
+
+#define B(x)	((x) - NI_NAMES_BASE)
+
+#define V(x)	((x) | 0x80)
+
+#define Gi_SRC(val, subsel) ((val) | ((subsel) << 6))
+
+struct family_route_values {
+	const char * family;
+	const u8 register_values[NI_NUM_NAMES][NI_NUM_NAMES];
+};
+
+static const struct family_route_values all_route_values[] = {
+	{
+		.family = "ni_660x",
+		.register_values = {
+			[B(NI_PFI(9))] = {
+				[B(NI_CtrAux(0))]	= V(9),
+				[B(NI_CtrAux(1))]	= V(9),
+				[B(NI_CtrAux(2))]	= V(9),
+				[B(NI_CtrAux(3))]	= V(9),
+				[B(NI_CtrAux(4))]	= V(9),
+				[B(NI_CtrAux(5))]	= V(9),
+				[B(NI_CtrAux(6))]	= V(9),
+				[B(NI_CtrAux(7))]	= V(9 /* or 1 */),
+			},
+			[B(NI_PFI(10))] = {
+				[B(NI_CtrGate(0))]	= V(9),
+				[B(NI_CtrGate(1))]	= V(9),
+				[B(NI_CtrGate(2))]	= V(9),
+				[B(NI_CtrGate(3))]	= V(9),
+				[B(NI_CtrGate(4))]	= V(9),
+				[B(NI_CtrGate(5))]	= V(9),
+				[B(NI_CtrGate(6))]	= V(9),
+				[B(NI_CtrGate(7))]	= V(9 /* or 1 */),
+			},
+			[B(NI_PFI(11))] = {
+				[B(NI_CtrSource(0))]	= V(9),
+				[B(NI_CtrSource(1))]	= V(9),
+				[B(NI_CtrSource(2))]	= V(9),
+				[B(NI_CtrSource(3))]	= V(9),
+				[B(NI_CtrSource(4))]	= V(9),
+				[B(NI_CtrSource(5))]	= V(9),
+				[B(NI_CtrSource(6))]	= V(9),
+				[B(NI_CtrSource(7))]	= V(9 /* or 1 */),
+				[B(NI_CtrGate(7))]	= V(0),
+				[B(NI_CtrAux(7))]	= V(0),
+			},
+			[B(NI_PFI(13))] = {
+				[B(NI_CtrAux(0))]	= V(8),
+				[B(NI_CtrAux(1))]	= V(8),
+				[B(NI_CtrAux(2))]	= V(8),
+				[B(NI_CtrAux(3))]	= V(8),
+				[B(NI_CtrAux(4))]	= V(8),
+				[B(NI_CtrAux(5))]	= V(8),
+				[B(NI_CtrAux(6))]	= V(8 /* or 1 */),
+				[B(NI_CtrAux(7))]	= V(8),
+			},
+			[B(NI_PFI(14))] = {
+				[B(NI_CtrGate(0))]	= V(8),
+				[B(NI_CtrGate(1))]	= V(8),
+				[B(NI_CtrGate(2))]	= V(8),
+				[B(NI_CtrGate(3))]	= V(8),
+				[B(NI_CtrGate(4))]	= V(8),
+				[B(NI_CtrGate(5))]	= V(8),
+				[B(NI_CtrGate(6))]	= V(8 /* or 1 */),
+				[B(NI_CtrGate(7))]	= V(8),
+			},
+			[B(NI_PFI(15))] = {
+				[B(NI_CtrSource(0))]	= V(8),
+				[B(NI_CtrSource(1))]	= V(8),
+				[B(NI_CtrSource(2))]	= V(8),
+				[B(NI_CtrSource(3))]	= V(8),
+				[B(NI_CtrSource(4))]	= V(8),
+				[B(NI_CtrSource(5))]	= V(8),
+				[B(NI_CtrSource(6))]	= V(8 /* or 1 */),
+				[B(NI_CtrSource(7))]	= V(8),
+				[B(NI_CtrGate(6))]	= V(0),
+				[B(NI_CtrAux(6))]	= V(0),
+			},
+			[B(NI_PFI(17))] = {
+				[B(NI_CtrAux(0))]	= V(7),
+				[B(NI_CtrAux(1))]	= V(7),
+				[B(NI_CtrAux(2))]	= V(7),
+				[B(NI_CtrAux(3))]	= V(7),
+				[B(NI_CtrAux(4))]	= V(7),
+				[B(NI_CtrAux(5))]	= V(7 /* or 1 */),
+				[B(NI_CtrAux(6))]	= V(7),
+				[B(NI_CtrAux(7))]	= V(7),
+			},
+			[B(NI_PFI(18))] = {
+				[B(NI_CtrGate(0))]	= V(7),
+				[B(NI_CtrGate(1))]	= V(7),
+				[B(NI_CtrGate(2))]	= V(7),
+				[B(NI_CtrGate(3))]	= V(7),
+				[B(NI_CtrGate(4))]	= V(7),
+				[B(NI_CtrGate(5))]	= V(7 /* or 1 */),
+				[B(NI_CtrGate(6))]	= V(7),
+				[B(NI_CtrGate(7))]	= V(7),
+			},
+			[B(NI_PFI(19))] = {
+				[B(NI_CtrSource(0))]	= V(7),
+				[B(NI_CtrSource(1))]	= V(7),
+				[B(NI_CtrSource(2))]	= V(7),
+				[B(NI_CtrSource(3))]	= V(7),
+				[B(NI_CtrSource(4))]	= V(7),
+				[B(NI_CtrSource(5))]	= V(7 /* or 1 */),
+				[B(NI_CtrSource(6))]	= V(7),
+				[B(NI_CtrSource(7))]	= V(7),
+				[B(NI_CtrGate(5))]	= V(0),
+				[B(NI_CtrAux(5))]	= V(0),
+			},
+			[B(NI_PFI(21))] = {
+				[B(NI_CtrAux(0))]	= V(6),
+				[B(NI_CtrAux(1))]	= V(6),
+				[B(NI_CtrAux(2))]	= V(6),
+				[B(NI_CtrAux(3))]	= V(6),
+				[B(NI_CtrAux(4))]	= V(6 /* or 1 */),
+				[B(NI_CtrAux(5))]	= V(6),
+				[B(NI_CtrAux(6))]	= V(6),
+				[B(NI_CtrAux(7))]	= V(6),
+			},
+			[B(NI_PFI(22))] = {
+				[B(NI_CtrGate(0))]	= V(6),
+				[B(NI_CtrGate(1))]	= V(6),
+				[B(NI_CtrGate(2))]	= V(6),
+				[B(NI_CtrGate(3))]	= V(6),
+				[B(NI_CtrGate(4))]	= V(6 /* or 1 */),
+				[B(NI_CtrGate(5))]	= V(6),
+				[B(NI_CtrGate(6))]	= V(6),
+				[B(NI_CtrGate(7))]	= V(6),
+			},
+			[B(NI_PFI(23))] = {
+				[B(NI_CtrSource(0))]	= V(6),
+				[B(NI_CtrSource(1))]	= V(6),
+				[B(NI_CtrSource(2))]	= V(6),
+				[B(NI_CtrSource(3))]	= V(6),
+				[B(NI_CtrSource(4))]	= V(6 /* or 1 */),
+				[B(NI_CtrSource(5))]	= V(6),
+				[B(NI_CtrSource(6))]	= V(6),
+				[B(NI_CtrSource(7))]	= V(6),
+				[B(NI_CtrGate(4))]	= V(0),
+				[B(NI_CtrAux(4))]	= V(0),
+			},
+			[B(NI_PFI(25))] = {
+				[B(NI_CtrAux(0))]	= V(5),
+				[B(NI_CtrAux(1))]	= V(5),
+				[B(NI_CtrAux(2))]	= V(5),
+				[B(NI_CtrAux(3))]	= V(5 /* or 1 */),
+				[B(NI_CtrAux(4))]	= V(5),
+				[B(NI_CtrAux(5))]	= V(5),
+				[B(NI_CtrAux(6))]	= V(5),
+				[B(NI_CtrAux(7))]	= V(5),
+			},
+			[B(NI_PFI(26))] = {
+				[B(NI_CtrGate(0))]	= V(5),
+				[B(NI_CtrGate(1))]	= V(5),
+				[B(NI_CtrGate(2))]	= V(5),
+				[B(NI_CtrGate(3))]	= V(5 /* or 1 */),
+				[B(NI_CtrGate(4))]	= V(5),
+				[B(NI_CtrGate(5))]	= V(5),
+				[B(NI_CtrGate(6))]	= V(5),
+				[B(NI_CtrGate(7))]	= V(5),
+			},
+			[B(NI_PFI(27))] = {
+				[B(NI_CtrSource(0))]	= V(5),
+				[B(NI_CtrSource(1))]	= V(5),
+				[B(NI_CtrSource(2))]	= V(5),
+				[B(NI_CtrSource(3))]	= V(5 /* or 1 */),
+				[B(NI_CtrSource(4))]	= V(5),
+				[B(NI_CtrSource(5))]	= V(5),
+				[B(NI_CtrSource(6))]	= V(5),
+				[B(NI_CtrSource(7))]	= V(5),
+				[B(NI_CtrGate(3))]	= V(0),
+				[B(NI_CtrAux(3))]	= V(0),
+			},
+			[B(NI_PFI(29))] = {
+				[B(NI_CtrAux(0))]	= V(4),
+				[B(NI_CtrAux(1))]	= V(4),
+				[B(NI_CtrAux(2))]	= V(4 /* or 1 */),
+				[B(NI_CtrAux(3))]	= V(4),
+				[B(NI_CtrAux(4))]	= V(4),
+				[B(NI_CtrAux(5))]	= V(4),
+				[B(NI_CtrAux(6))]	= V(4),
+				[B(NI_CtrAux(7))]	= V(4),
+			},
+			[B(NI_PFI(30))] = {
+				[B(NI_CtrGate(0))]	= V(4),
+				[B(NI_CtrGate(1))]	= V(4),
+				[B(NI_CtrGate(2))]	= V(4 /* or 1 */),
+				[B(NI_CtrGate(3))]	= V(4),
+				[B(NI_CtrGate(4))]	= V(4),
+				[B(NI_CtrGate(5))]	= V(4),
+				[B(NI_CtrGate(6))]	= V(4),
+				[B(NI_CtrGate(7))]	= V(4),
+			},
+			[B(NI_PFI(31))] = {
+				[B(NI_CtrSource(0))]	= V(4),
+				[B(NI_CtrSource(1))]	= V(4),
+				[B(NI_CtrSource(2))]	= V(4 /* or 1 */),
+				[B(NI_CtrSource(3))]	= V(4),
+				[B(NI_CtrSource(4))]	= V(4),
+				[B(NI_CtrSource(5))]	= V(4),
+				[B(NI_CtrSource(6))]	= V(4),
+				[B(NI_CtrSource(7))]	= V(4),
+				[B(NI_CtrGate(2))]	= V(0),
+				[B(NI_CtrAux(2))]	= V(0),
+			},
+			[B(NI_PFI(33))] = {
+				[B(NI_CtrAux(0))]	= V(3),
+				[B(NI_CtrAux(1))]	= V(3 /* or 1 */),
+				[B(NI_CtrAux(2))]	= V(3),
+				[B(NI_CtrAux(3))]	= V(3),
+				[B(NI_CtrAux(4))]	= V(3),
+				[B(NI_CtrAux(5))]	= V(3),
+				[B(NI_CtrAux(6))]	= V(3),
+				[B(NI_CtrAux(7))]	= V(3),
+			},
+			[B(NI_PFI(34))] = {
+				[B(NI_CtrGate(0))]	= V(3),
+				[B(NI_CtrGate(1))]	= V(3 /* or 1 */),
+				[B(NI_CtrGate(2))]	= V(3),
+				[B(NI_CtrGate(3))]	= V(3),
+				[B(NI_CtrGate(4))]	= V(3),
+				[B(NI_CtrGate(5))]	= V(3),
+				[B(NI_CtrGate(6))]	= V(3),
+				[B(NI_CtrGate(7))]	= V(3),
+			},
+			[B(NI_PFI(35))] = {
+				[B(NI_CtrSource(0))]	= V(3),
+				[B(NI_CtrSource(1))]	= V(3 /* or 1 */),
+				[B(NI_CtrSource(2))]	= V(3),
+				[B(NI_CtrSource(3))]	= V(3),
+				[B(NI_CtrSource(4))]	= V(3),
+				[B(NI_CtrSource(5))]	= V(3),
+				[B(NI_CtrSource(6))]	= V(3),
+				[B(NI_CtrSource(7))]	= V(3),
+				[B(NI_CtrGate(1))]	= V(0),
+				[B(NI_CtrAux(1))]	= V(0),
+			},
+			[B(NI_PFI(37))] = {
+				[B(NI_CtrAux(0))]	= V(2 /* or 1 */),
+				[B(NI_CtrAux(1))]	= V(2),
+				[B(NI_CtrAux(2))]	= V(2),
+				[B(NI_CtrAux(3))]	= V(2),
+				[B(NI_CtrAux(4))]	= V(2),
+				[B(NI_CtrAux(5))]	= V(2),
+				[B(NI_CtrAux(6))]	= V(2),
+				[B(NI_CtrAux(7))]	= V(2),
+			},
+			[B(NI_PFI(38))] = {
+				[B(NI_CtrGate(0))]	= V(2 /* or 1 */),
+				[B(NI_CtrGate(1))]	= V(2),
+				[B(NI_CtrGate(2))]	= V(2),
+				[B(NI_CtrGate(3))]	= V(2),
+				[B(NI_CtrGate(4))]	= V(2),
+				[B(NI_CtrGate(5))]	= V(2),
+				[B(NI_CtrGate(6))]	= V(2),
+				[B(NI_CtrGate(7))]	= V(2),
+			},
+			[B(NI_PFI(39))] = {
+				[B(NI_CtrSource(0))]	= V(2 /* or 1 */),
+				[B(NI_CtrSource(1))]	= V(2),
+				[B(NI_CtrSource(2))]	= V(2),
+				[B(NI_CtrSource(3))]	= V(2),
+				[B(NI_CtrSource(4))]	= V(2),
+				[B(NI_CtrSource(5))]	= V(2),
+				[B(NI_CtrSource(6))]	= V(2),
+				[B(NI_CtrSource(7))]	= V(2),
+				[B(NI_CtrGate(0))]	= V(0),
+				[B(NI_CtrAux(0))]	= V(0),
+			},
+			[B(TRIGGER_LINE(0))] = {
+				[B(NI_CtrSource(0))]	= V(11),
+				[B(NI_CtrSource(1))]	= V(11),
+				[B(NI_CtrSource(2))]	= V(11),
+				[B(NI_CtrSource(3))]	= V(11),
+				[B(NI_CtrSource(4))]	= V(11),
+				[B(NI_CtrSource(5))]	= V(11),
+				[B(NI_CtrSource(6))]	= V(11),
+				[B(NI_CtrSource(7))]	= V(11),
+				[B(NI_CtrGate(0))]	= V(11),
+				[B(NI_CtrGate(1))]	= V(11),
+				[B(NI_CtrGate(2))]	= V(11),
+				[B(NI_CtrGate(3))]	= V(11),
+				[B(NI_CtrGate(4))]	= V(11),
+				[B(NI_CtrGate(5))]	= V(11),
+				[B(NI_CtrGate(6))]	= V(11),
+				[B(NI_CtrGate(7))]	= V(11),
+				[B(NI_CtrAux(0))]	= V(11),
+				[B(NI_CtrAux(1))]	= V(11),
+				[B(NI_CtrAux(2))]	= V(11),
+				[B(NI_CtrAux(3))]	= V(11),
+				[B(NI_CtrAux(4))]	= V(11),
+				[B(NI_CtrAux(5))]	= V(11),
+				[B(NI_CtrAux(6))]	= V(11),
+				[B(NI_CtrAux(7))]	= V(11),
+			},
+			[B(TRIGGER_LINE(1))] = {
+				[B(NI_CtrSource(0))]	= V(12),
+				[B(NI_CtrSource(1))]	= V(12),
+				[B(NI_CtrSource(2))]	= V(12),
+				[B(NI_CtrSource(3))]	= V(12),
+				[B(NI_CtrSource(4))]	= V(12),
+				[B(NI_CtrSource(5))]	= V(12),
+				[B(NI_CtrSource(6))]	= V(12),
+				[B(NI_CtrSource(7))]	= V(12),
+				[B(NI_CtrGate(0))]	= V(12),
+				[B(NI_CtrGate(1))]	= V(12),
+				[B(NI_CtrGate(2))]	= V(12),
+				[B(NI_CtrGate(3))]	= V(12),
+				[B(NI_CtrGate(4))]	= V(12),
+				[B(NI_CtrGate(5))]	= V(12),
+				[B(NI_CtrGate(6))]	= V(12),
+				[B(NI_CtrGate(7))]	= V(12),
+				[B(NI_CtrAux(0))]	= V(12),
+				[B(NI_CtrAux(1))]	= V(12),
+				[B(NI_CtrAux(2))]	= V(12),
+				[B(NI_CtrAux(3))]	= V(12),
+				[B(NI_CtrAux(4))]	= V(12),
+				[B(NI_CtrAux(5))]	= V(12),
+				[B(NI_CtrAux(6))]	= V(12),
+				[B(NI_CtrAux(7))]	= V(12),
+			},
+			[B(TRIGGER_LINE(2))] = {
+				[B(NI_CtrSource(0))]	= V(13),
+				[B(NI_CtrSource(1))]	= V(13),
+				[B(NI_CtrSource(2))]	= V(13),
+				[B(NI_CtrSource(3))]	= V(13),
+				[B(NI_CtrSource(4))]	= V(13),
+				[B(NI_CtrSource(5))]	= V(13),
+				[B(NI_CtrSource(6))]	= V(13),
+				[B(NI_CtrSource(7))]	= V(13),
+				[B(NI_CtrGate(0))]	= V(13),
+				[B(NI_CtrGate(1))]	= V(13),
+				[B(NI_CtrGate(2))]	= V(13),
+				[B(NI_CtrGate(3))]	= V(13),
+				[B(NI_CtrGate(4))]	= V(13),
+				[B(NI_CtrGate(5))]	= V(13),
+				[B(NI_CtrGate(6))]	= V(13),
+				[B(NI_CtrGate(7))]	= V(13),
+				[B(NI_CtrAux(0))]	= V(13),
+				[B(NI_CtrAux(1))]	= V(13),
+				[B(NI_CtrAux(2))]	= V(13),
+				[B(NI_CtrAux(3))]	= V(13),
+				[B(NI_CtrAux(4))]	= V(13),
+				[B(NI_CtrAux(5))]	= V(13),
+				[B(NI_CtrAux(6))]	= V(13),
+				[B(NI_CtrAux(7))]	= V(13),
+			},
+			[B(TRIGGER_LINE(3))] = {
+				[B(NI_CtrSource(0))]	= V(14),
+				[B(NI_CtrSource(1))]	= V(14),
+				[B(NI_CtrSource(2))]	= V(14),
+				[B(NI_CtrSource(3))]	= V(14),
+				[B(NI_CtrSource(4))]	= V(14),
+				[B(NI_CtrSource(5))]	= V(14),
+				[B(NI_CtrSource(6))]	= V(14),
+				[B(NI_CtrSource(7))]	= V(14),
+				[B(NI_CtrGate(0))]	= V(14),
+				[B(NI_CtrGate(1))]	= V(14),
+				[B(NI_CtrGate(2))]	= V(14),
+				[B(NI_CtrGate(3))]	= V(14),
+				[B(NI_CtrGate(4))]	= V(14),
+				[B(NI_CtrGate(5))]	= V(14),
+				[B(NI_CtrGate(6))]	= V(14),
+				[B(NI_CtrGate(7))]	= V(14),
+				[B(NI_CtrAux(0))]	= V(14),
+				[B(NI_CtrAux(1))]	= V(14),
+				[B(NI_CtrAux(2))]	= V(14),
+				[B(NI_CtrAux(3))]	= V(14),
+				[B(NI_CtrAux(4))]	= V(14),
+				[B(NI_CtrAux(5))]	= V(14),
+				[B(NI_CtrAux(6))]	= V(14),
+				[B(NI_CtrAux(7))]	= V(14),
+			},
+			[B(TRIGGER_LINE(4))] = {
+				[B(NI_CtrSource(0))]	= V(15),
+				[B(NI_CtrSource(1))]	= V(15),
+				[B(NI_CtrSource(2))]	= V(15),
+				[B(NI_CtrSource(3))]	= V(15),
+				[B(NI_CtrSource(4))]	= V(15),
+				[B(NI_CtrSource(5))]	= V(15),
+				[B(NI_CtrSource(6))]	= V(15),
+				[B(NI_CtrSource(7))]	= V(15),
+				[B(NI_CtrGate(0))]	= V(15),
+				[B(NI_CtrGate(1))]	= V(15),
+				[B(NI_CtrGate(2))]	= V(15),
+				[B(NI_CtrGate(3))]	= V(15),
+				[B(NI_CtrGate(4))]	= V(15),
+				[B(NI_CtrGate(5))]	= V(15),
+				[B(NI_CtrGate(6))]	= V(15),
+				[B(NI_CtrGate(7))]	= V(15),
+				[B(NI_CtrAux(0))]	= V(15),
+				[B(NI_CtrAux(1))]	= V(15),
+				[B(NI_CtrAux(2))]	= V(15),
+				[B(NI_CtrAux(3))]	= V(15),
+				[B(NI_CtrAux(4))]	= V(15),
+				[B(NI_CtrAux(5))]	= V(15),
+				[B(NI_CtrAux(6))]	= V(15),
+				[B(NI_CtrAux(7))]	= V(15),
+			},
+			[B(TRIGGER_LINE(5))] = {
+				[B(NI_CtrSource(0))]	= V(16),
+				[B(NI_CtrSource(1))]	= V(16),
+				[B(NI_CtrSource(2))]	= V(16),
+				[B(NI_CtrSource(3))]	= V(16),
+				[B(NI_CtrSource(4))]	= V(16),
+				[B(NI_CtrSource(5))]	= V(16),
+				[B(NI_CtrSource(6))]	= V(16),
+				[B(NI_CtrSource(7))]	= V(16),
+				[B(NI_CtrGate(0))]	= V(16),
+				[B(NI_CtrGate(1))]	= V(16),
+				[B(NI_CtrGate(2))]	= V(16),
+				[B(NI_CtrGate(3))]	= V(16),
+				[B(NI_CtrGate(4))]	= V(16),
+				[B(NI_CtrGate(5))]	= V(16),
+				[B(NI_CtrGate(6))]	= V(16),
+				[B(NI_CtrGate(7))]	= V(16),
+				[B(NI_CtrAux(0))]	= V(16),
+				[B(NI_CtrAux(1))]	= V(16),
+				[B(NI_CtrAux(2))]	= V(16),
+				[B(NI_CtrAux(3))]	= V(16),
+				[B(NI_CtrAux(4))]	= V(16),
+				[B(NI_CtrAux(5))]	= V(16),
+				[B(NI_CtrAux(6))]	= V(16),
+				[B(NI_CtrAux(7))]	= V(16),
+			},
+			[B(TRIGGER_LINE(6))] = {
+				[B(NI_CtrSource(0))]	= V(17),
+				[B(NI_CtrSource(1))]	= V(17),
+				[B(NI_CtrSource(2))]	= V(17),
+				[B(NI_CtrSource(3))]	= V(17),
+				[B(NI_CtrSource(4))]	= V(17),
+				[B(NI_CtrSource(5))]	= V(17),
+				[B(NI_CtrSource(6))]	= V(17),
+				[B(NI_CtrSource(7))]	= V(17),
+				[B(NI_CtrGate(0))]	= V(17),
+				[B(NI_CtrGate(1))]	= V(17),
+				[B(NI_CtrGate(2))]	= V(17),
+				[B(NI_CtrGate(3))]	= V(17),
+				[B(NI_CtrGate(4))]	= V(17),
+				[B(NI_CtrGate(5))]	= V(17),
+				[B(NI_CtrGate(6))]	= V(17),
+				[B(NI_CtrGate(7))]	= V(17),
+				[B(NI_CtrAux(0))]	= V(17),
+				[B(NI_CtrAux(1))]	= V(17),
+				[B(NI_CtrAux(2))]	= V(17),
+				[B(NI_CtrAux(3))]	= V(17),
+				[B(NI_CtrAux(4))]	= V(17),
+				[B(NI_CtrAux(5))]	= V(17),
+				[B(NI_CtrAux(6))]	= V(17),
+				[B(NI_CtrAux(7))]	= V(17),
+			},
+			[B(NI_CtrSource(0))] = {
+				[B(NI_PFI(39))]	= V(1),
+				[B(NI_CtrGate(7))]	= V(10),
+				[B(NI_CtrAux(7))]	= V(10),
+			},
+			[B(NI_CtrSource(1))] = {
+				[B(NI_PFI(35))]	= V(1),
+				[B(NI_CtrGate(0))]	= V(10),
+				[B(NI_CtrAux(0))]	= V(10),
+			},
+			[B(NI_CtrSource(2))] = {
+				[B(NI_PFI(31))]	= V(1),
+				[B(NI_CtrGate(1))]	= V(10),
+				[B(NI_CtrAux(1))]	= V(10),
+			},
+			[B(NI_CtrSource(3))] = {
+				[B(NI_PFI(27))]	= V(1),
+				[B(NI_CtrGate(2))]	= V(10),
+				[B(NI_CtrAux(2))]	= V(10),
+			},
+			[B(NI_CtrSource(4))] = {
+				[B(NI_PFI(23))]	= V(1),
+				[B(NI_CtrGate(3))]	= V(10),
+				[B(NI_CtrAux(3))]	= V(10),
+			},
+			[B(NI_CtrSource(5))] = {
+				[B(NI_PFI(19))]	= V(1),
+				[B(NI_CtrGate(4))]	= V(10),
+				[B(NI_CtrAux(4))]	= V(10),
+			},
+			[B(NI_CtrSource(6))] = {
+				[B(NI_PFI(15))]	= V(1),
+				[B(NI_CtrGate(5))]	= V(10),
+				[B(NI_CtrAux(5))]	= V(10),
+			},
+			[B(NI_CtrSource(7))] = {
+				[B(NI_PFI(11))]	= V(1),
+				[B(NI_CtrGate(6))]	= V(10),
+				[B(NI_CtrAux(6))]	= V(10),
+			},
+			[B(NI_CtrGate(0))] = {
+				[B(NI_PFI(38))]	= V(1),
+				[B(NI_CtrSource(7))]	= V(10),
+				[B(NI_CtrAux(7))]	= V(30),
+			},
+			[B(NI_CtrGate(1))] = {
+				[B(NI_PFI(34))]	= V(1),
+				[B(NI_CtrSource(0))]	= V(10),
+				[B(NI_CtrAux(0))]	= V(30),
+			},
+			[B(NI_CtrGate(2))] = {
+				[B(NI_PFI(30))]	= V(1),
+				[B(NI_CtrSource(1))]	= V(10),
+				[B(NI_CtrAux(1))]	= V(30),
+			},
+			[B(NI_CtrGate(3))] = {
+				[B(NI_PFI(26))]	= V(1),
+				[B(NI_CtrSource(2))]	= V(10),
+				[B(NI_CtrAux(2))]	= V(30),
+			},
+			[B(NI_CtrGate(4))] = {
+				[B(NI_PFI(22))]	= V(1),
+				[B(NI_CtrSource(3))]	= V(10),
+				[B(NI_CtrAux(3))]	= V(30),
+			},
+			[B(NI_CtrGate(5))] = {
+				[B(NI_PFI(18))]	= V(1),
+				[B(NI_CtrSource(4))]	= V(10),
+				[B(NI_CtrAux(4))]	= V(30),
+			},
+			[B(NI_CtrGate(6))] = {
+				[B(NI_PFI(14))]	= V(1),
+				[B(NI_CtrSource(5))]	= V(10),
+				[B(NI_CtrAux(5))]	= V(30),
+			},
+			[B(NI_CtrGate(7))] = {
+				[B(NI_PFI(10))]	= V(1),
+				[B(NI_CtrSource(6))]	= V(10),
+				[B(NI_CtrAux(6))]	= V(30),
+			},
+			[B(NI_CtrInternalOutput(0))] = {
+				[B(NI_PFI(36))]	= V(1),
+				[B(NI_CtrGate(7))]	= V(20),
+				[B(NI_CtrAux(7))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(1))] = {
+				[B(NI_PFI(32))]	= V(1),
+				[B(NI_CtrGate(0))]	= V(20),
+				[B(NI_CtrAux(0))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(2))] = {
+				[B(NI_PFI(28))]	= V(1),
+				[B(NI_CtrGate(1))]	= V(20),
+				[B(NI_CtrAux(1))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(3))] = {
+				[B(NI_PFI(24))]	= V(1),
+				[B(NI_CtrGate(2))]	= V(20),
+				[B(NI_CtrAux(2))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(4))] = {
+				[B(NI_PFI(20))]	= V(1),
+				[B(NI_CtrGate(3))]	= V(20),
+				[B(NI_CtrAux(3))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(5))] = {
+				[B(NI_PFI(16))]	= V(1),
+				[B(NI_CtrGate(4))]	= V(20),
+				[B(NI_CtrAux(4))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(6))] = {
+				[B(NI_PFI(12))]	= V(1),
+				[B(NI_CtrGate(5))]	= V(20),
+				[B(NI_CtrAux(5))]	= V(20),
+			},
+			[B(NI_CtrInternalOutput(7))] = {
+				[B(NI_PFI(8))]	= V(1),
+				[B(NI_CtrGate(6))]	= V(20),
+				[B(NI_CtrAux(6))]	= V(20),
+			},
+			[B(NI_20MHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(0),
+				[B(NI_CtrSource(1))]	= V(0),
+				[B(NI_CtrSource(2))]	= V(0),
+				[B(NI_CtrSource(3))]	= V(0),
+				[B(NI_CtrSource(4))]	= V(0),
+				[B(NI_CtrSource(5))]	= V(0),
+				[B(NI_CtrSource(6))]	= V(0),
+				[B(NI_CtrSource(7))]	= V(0),
+			},
+			[B(NI_80MHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(30),
+				[B(NI_CtrSource(1))]	= V(30),
+				[B(NI_CtrSource(2))]	= V(30),
+				[B(NI_CtrSource(3))]	= V(30),
+				[B(NI_CtrSource(4))]	= V(30),
+				[B(NI_CtrSource(5))]	= V(30),
+				[B(NI_CtrSource(6))]	= V(30),
+				[B(NI_CtrSource(7))]	= V(30),
+			},
+			[B(NI_100kHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(18),
+				[B(NI_CtrSource(1))]	= V(18),
+				[B(NI_CtrSource(2))]	= V(18),
+				[B(NI_CtrSource(3))]	= V(18),
+				[B(NI_CtrSource(4))]	= V(18),
+				[B(NI_CtrSource(5))]	= V(18),
+				[B(NI_CtrSource(6))]	= V(18),
+				[B(NI_CtrSource(7))]	= V(18),
+			},
+			[B(NI_LogicLow)] = {
+				[B(NI_CtrSource(0))]	= V(31),
+				[B(NI_CtrSource(1))]	= V(31),
+				[B(NI_CtrSource(2))]	= V(31),
+				[B(NI_CtrSource(3))]	= V(31),
+				[B(NI_CtrSource(4))]	= V(31),
+				[B(NI_CtrSource(5))]	= V(31),
+				[B(NI_CtrSource(6))]	= V(31),
+				[B(NI_CtrSource(7))]	= V(31),
+				[B(NI_CtrGate(0))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(1))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(2))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(3))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(4))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(5))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(6))]	= V(31 /* or 30 */),
+				[B(NI_CtrGate(7))]	= V(31 /* or 30 */),
+				[B(NI_CtrAux(0))]	= V(31),
+				[B(NI_CtrAux(1))]	= V(31),
+				[B(NI_CtrAux(2))]	= V(31),
+				[B(NI_CtrAux(3))]	= V(31),
+				[B(NI_CtrAux(4))]	= V(31),
+				[B(NI_CtrAux(5))]	= V(31),
+				[B(NI_CtrAux(6))]	= V(31),
+				[B(NI_CtrAux(7))]	= V(31),
+			},
+		},
+	},
+	{
+		.family = "ni_eseries",
+		.register_values = {
+			[B(NI_PFI(0))] = {
+				[B(NI_CtrSource(0))]	= V(1),
+				[B(NI_CtrSource(1))]	= V(1),
+				[B(NI_CtrGate(0))]	= V(1),
+				[B(NI_CtrGate(1))]	= V(1),
+				[B(NI_AI_SampleClock)]	= V(1),
+				[B(NI_AI_SampleClockTimebase)]	= V(1),
+				[B(NI_AI_StartTrigger)]	= V(1),
+				[B(NI_AI_ReferenceTrigger)]	= V(1),
+				[B(NI_AI_ConvertClock)]	= V(1),
+				[B(NI_AI_PauseTrigger)]	= V(1),
+				[B(NI_AO_SampleClock)]	= V(1),
+				[B(NI_AO_SampleClockTimebase)]	= V(1),
+				[B(NI_AO_StartTrigger)]	= V(1),
+				[B(NI_AO_PauseTrigger)]	= V(1),
+			},
+			[B(NI_PFI(1))] = {
+				[B(NI_CtrSource(0))]	= V(2),
+				[B(NI_CtrSource(1))]	= V(2),
+				[B(NI_CtrGate(0))]	= V(2),
+				[B(NI_CtrGate(1))]	= V(2),
+				[B(NI_AI_SampleClock)]	= V(2),
+				[B(NI_AI_SampleClockTimebase)]	= V(2),
+				[B(NI_AI_StartTrigger)]	= V(2),
+				[B(NI_AI_ReferenceTrigger)]	= V(2),
+				[B(NI_AI_ConvertClock)]	= V(2),
+				[B(NI_AI_PauseTrigger)]	= V(2),
+				[B(NI_AO_SampleClock)]	= V(2),
+				[B(NI_AO_SampleClockTimebase)]	= V(2),
+				[B(NI_AO_StartTrigger)]	= V(2),
+				[B(NI_AO_PauseTrigger)]	= V(2),
+			},
+			[B(NI_PFI(2))] = {
+				[B(NI_CtrSource(0))]	= V(3),
+				[B(NI_CtrSource(1))]	= V(3),
+				[B(NI_CtrGate(0))]	= V(3),
+				[B(NI_CtrGate(1))]	= V(3),
+				[B(NI_AI_SampleClock)]	= V(3),
+				[B(NI_AI_SampleClockTimebase)]	= V(3),
+				[B(NI_AI_StartTrigger)]	= V(3),
+				[B(NI_AI_ReferenceTrigger)]	= V(3),
+				[B(NI_AI_ConvertClock)]	= V(3),
+				[B(NI_AI_PauseTrigger)]	= V(3),
+				[B(NI_AO_SampleClock)]	= V(3),
+				[B(NI_AO_SampleClockTimebase)]	= V(3),
+				[B(NI_AO_StartTrigger)]	= V(3),
+				[B(NI_AO_PauseTrigger)]	= V(3),
+			},
+			[B(NI_PFI(3))] = {
+				[B(NI_CtrSource(0))]	= V(4),
+				[B(NI_CtrSource(1))]	= V(4),
+				[B(NI_CtrGate(0))]	= V(4),
+				[B(NI_CtrGate(1))]	= V(4),
+				[B(NI_AI_SampleClock)]	= V(4),
+				[B(NI_AI_SampleClockTimebase)]	= V(4),
+				[B(NI_AI_StartTrigger)]	= V(4),
+				[B(NI_AI_ReferenceTrigger)]	= V(4),
+				[B(NI_AI_ConvertClock)]	= V(4),
+				[B(NI_AI_PauseTrigger)]	= V(4),
+				[B(NI_AO_SampleClock)]	= V(4),
+				[B(NI_AO_SampleClockTimebase)]	= V(4),
+				[B(NI_AO_StartTrigger)]	= V(4),
+				[B(NI_AO_PauseTrigger)]	= V(4),
+			},
+			[B(NI_PFI(4))] = {
+				[B(NI_CtrSource(0))]	= V(5),
+				[B(NI_CtrSource(1))]	= V(5),
+				[B(NI_CtrGate(0))]	= V(5),
+				[B(NI_CtrGate(1))]	= V(5),
+				[B(NI_AI_SampleClock)]	= V(5),
+				[B(NI_AI_SampleClockTimebase)]	= V(5),
+				[B(NI_AI_StartTrigger)]	= V(5),
+				[B(NI_AI_ReferenceTrigger)]	= V(5),
+				[B(NI_AI_ConvertClock)]	= V(5),
+				[B(NI_AI_PauseTrigger)]	= V(5),
+				[B(NI_AO_SampleClock)]	= V(5),
+				[B(NI_AO_SampleClockTimebase)]	= V(5),
+				[B(NI_AO_StartTrigger)]	= V(5),
+				[B(NI_AO_PauseTrigger)]	= V(5),
+			},
+			[B(NI_PFI(5))] = {
+				[B(NI_CtrSource(0))]	= V(6),
+				[B(NI_CtrSource(1))]	= V(6),
+				[B(NI_CtrGate(0))]	= V(6),
+				[B(NI_CtrGate(1))]	= V(6),
+				[B(NI_AI_SampleClock)]	= V(6),
+				[B(NI_AI_SampleClockTimebase)]	= V(6),
+				[B(NI_AI_StartTrigger)]	= V(6),
+				[B(NI_AI_ReferenceTrigger)]	= V(6),
+				[B(NI_AI_ConvertClock)]	= V(6),
+				[B(NI_AI_PauseTrigger)]	= V(6),
+				[B(NI_AO_SampleClock)]	= V(6),
+				[B(NI_AO_SampleClockTimebase)]	= V(6),
+				[B(NI_AO_StartTrigger)]	= V(6),
+				[B(NI_AO_PauseTrigger)]	= V(6),
+			},
+			[B(NI_PFI(6))] = {
+				[B(NI_CtrSource(0))]	= V(7),
+				[B(NI_CtrSource(1))]	= V(7),
+				[B(NI_CtrGate(0))]	= V(7),
+				[B(NI_CtrGate(1))]	= V(7),
+				[B(NI_AI_SampleClock)]	= V(7),
+				[B(NI_AI_SampleClockTimebase)]	= V(7),
+				[B(NI_AI_StartTrigger)]	= V(7),
+				[B(NI_AI_ReferenceTrigger)]	= V(7),
+				[B(NI_AI_ConvertClock)]	= V(7),
+				[B(NI_AI_PauseTrigger)]	= V(7),
+				[B(NI_AO_SampleClock)]	= V(7),
+				[B(NI_AO_SampleClockTimebase)]	= V(7),
+				[B(NI_AO_StartTrigger)]	= V(7),
+				[B(NI_AO_PauseTrigger)]	= V(7),
+			},
+			[B(NI_PFI(7))] = {
+				[B(NI_CtrSource(0))]	= V(8),
+				[B(NI_CtrSource(1))]	= V(8),
+				[B(NI_CtrGate(0))]	= V(8),
+				[B(NI_CtrGate(1))]	= V(8),
+				[B(NI_AI_SampleClock)]	= V(8),
+				[B(NI_AI_SampleClockTimebase)]	= V(8),
+				[B(NI_AI_StartTrigger)]	= V(8),
+				[B(NI_AI_ReferenceTrigger)]	= V(8),
+				[B(NI_AI_ConvertClock)]	= V(8),
+				[B(NI_AI_PauseTrigger)]	= V(8),
+				[B(NI_AO_SampleClock)]	= V(8),
+				[B(NI_AO_SampleClockTimebase)]	= V(8),
+				[B(NI_AO_StartTrigger)]	= V(8),
+				[B(NI_AO_PauseTrigger)]	= V(8),
+			},
+			[B(NI_PFI(8))] = {
+				[B(NI_CtrSource(0))]	= V(9),
+				[B(NI_CtrSource(1))]	= V(9),
+				[B(NI_CtrGate(0))]	= V(9),
+				[B(NI_CtrGate(1))]	= V(9),
+				[B(NI_AI_SampleClock)]	= V(9),
+				[B(NI_AI_SampleClockTimebase)]	= V(9),
+				[B(NI_AI_StartTrigger)]	= V(9),
+				[B(NI_AI_ReferenceTrigger)]	= V(9),
+				[B(NI_AI_ConvertClock)]	= V(9),
+				[B(NI_AI_PauseTrigger)]	= V(9),
+				[B(NI_AO_SampleClock)]	= V(9),
+				[B(NI_AO_SampleClockTimebase)]	= V(9),
+				[B(NI_AO_StartTrigger)]	= V(9),
+				[B(NI_AO_PauseTrigger)]	= V(9),
+			},
+			[B(NI_PFI(9))] = {
+				[B(NI_CtrSource(0))]	= V(10),
+				[B(NI_CtrSource(1))]	= V(10),
+				[B(NI_CtrGate(0))]	= V(10),
+				[B(NI_CtrGate(1))]	= V(10),
+				[B(NI_AI_SampleClock)]	= V(10),
+				[B(NI_AI_SampleClockTimebase)]	= V(10),
+				[B(NI_AI_StartTrigger)]	= V(10),
+				[B(NI_AI_ReferenceTrigger)]	= V(10),
+				[B(NI_AI_ConvertClock)]	= V(10),
+				[B(NI_AI_PauseTrigger)]	= V(10),
+				[B(NI_AO_SampleClock)]	= V(10),
+				[B(NI_AO_SampleClockTimebase)]	= V(10),
+				[B(NI_AO_StartTrigger)]	= V(10),
+				[B(NI_AO_PauseTrigger)]	= V(10),
+			},
+			[B(TRIGGER_LINE(0))] = {
+				[B(NI_RTSI_BRD(0))]	= V(0),
+				[B(NI_RTSI_BRD(1))]	= V(0),
+				[B(NI_RTSI_BRD(2))]	= V(0),
+				[B(NI_RTSI_BRD(3))]	= V(0),
+				[B(NI_CtrSource(0))]	= V(11),
+				[B(NI_CtrSource(1))]	= V(11),
+				[B(NI_CtrGate(0))]	= V(11),
+				[B(NI_CtrGate(1))]	= V(11),
+				[B(NI_CtrOut(0))]	= V(1),
+				[B(NI_AI_SampleClock)]	= V(11),
+				[B(NI_AI_SampleClockTimebase)]	= V(11),
+				[B(NI_AI_StartTrigger)]	= V(11),
+				[B(NI_AI_ReferenceTrigger)]	= V(11),
+				[B(NI_AI_ConvertClock)]	= V(11),
+				[B(NI_AI_PauseTrigger)]	= V(11),
+				[B(NI_AO_SampleClock)]	= V(11),
+				[B(NI_AO_SampleClockTimebase)]	= V(11),
+				[B(NI_AO_StartTrigger)]	= V(11),
+				[B(NI_AO_PauseTrigger)]	= V(11),
+			},
+			[B(TRIGGER_LINE(1))] = {
+				[B(NI_RTSI_BRD(0))]	= V(1),
+				[B(NI_RTSI_BRD(1))]	= V(1),
+				[B(NI_RTSI_BRD(2))]	= V(1),
+				[B(NI_RTSI_BRD(3))]	= V(1),
+				[B(NI_CtrSource(0))]	= V(12),
+				[B(NI_CtrSource(1))]	= V(12),
+				[B(NI_CtrGate(0))]	= V(12),
+				[B(NI_CtrGate(1))]	= V(12),
+				[B(NI_CtrOut(0))]	= V(2),
+				[B(NI_AI_SampleClock)]	= V(12),
+				[B(NI_AI_SampleClockTimebase)]	= V(12),
+				[B(NI_AI_StartTrigger)]	= V(12),
+				[B(NI_AI_ReferenceTrigger)]	= V(12),
+				[B(NI_AI_ConvertClock)]	= V(12),
+				[B(NI_AI_PauseTrigger)]	= V(12),
+				[B(NI_AO_SampleClock)]	= V(12),
+				[B(NI_AO_SampleClockTimebase)]	= V(12),
+				[B(NI_AO_StartTrigger)]	= V(12),
+				[B(NI_AO_PauseTrigger)]	= V(12),
+			},
+			[B(TRIGGER_LINE(2))] = {
+				[B(NI_RTSI_BRD(0))]	= V(2),
+				[B(NI_RTSI_BRD(1))]	= V(2),
+				[B(NI_RTSI_BRD(2))]	= V(2),
+				[B(NI_RTSI_BRD(3))]	= V(2),
+				[B(NI_CtrSource(0))]	= V(13),
+				[B(NI_CtrSource(1))]	= V(13),
+				[B(NI_CtrGate(0))]	= V(13),
+				[B(NI_CtrGate(1))]	= V(13),
+				[B(NI_CtrOut(0))]	= V(3),
+				[B(NI_AI_SampleClock)]	= V(13),
+				[B(NI_AI_SampleClockTimebase)]	= V(13),
+				[B(NI_AI_StartTrigger)]	= V(13),
+				[B(NI_AI_ReferenceTrigger)]	= V(13),
+				[B(NI_AI_ConvertClock)]	= V(13),
+				[B(NI_AI_PauseTrigger)]	= V(13),
+				[B(NI_AO_SampleClock)]	= V(13),
+				[B(NI_AO_SampleClockTimebase)]	= V(13),
+				[B(NI_AO_StartTrigger)]	= V(13),
+				[B(NI_AO_PauseTrigger)]	= V(13),
+			},
+			[B(TRIGGER_LINE(3))] = {
+				[B(NI_RTSI_BRD(0))]	= V(3),
+				[B(NI_RTSI_BRD(1))]	= V(3),
+				[B(NI_RTSI_BRD(2))]	= V(3),
+				[B(NI_RTSI_BRD(3))]	= V(3),
+				[B(NI_CtrSource(0))]	= V(14),
+				[B(NI_CtrSource(1))]	= V(14),
+				[B(NI_CtrGate(0))]	= V(14),
+				[B(NI_CtrGate(1))]	= V(14),
+				[B(NI_CtrOut(0))]	= V(4),
+				[B(NI_AI_SampleClock)]	= V(14),
+				[B(NI_AI_SampleClockTimebase)]	= V(14),
+				[B(NI_AI_StartTrigger)]	= V(14),
+				[B(NI_AI_ReferenceTrigger)]	= V(14),
+				[B(NI_AI_ConvertClock)]	= V(14),
+				[B(NI_AI_PauseTrigger)]	= V(14),
+				[B(NI_AO_SampleClock)]	= V(14),
+				[B(NI_AO_SampleClockTimebase)]	= V(14),
+				[B(NI_AO_StartTrigger)]	= V(14),
+				[B(NI_AO_PauseTrigger)]	= V(14),
+			},
+			[B(TRIGGER_LINE(4))] = {
+				[B(NI_RTSI_BRD(0))]	= V(4),
+				[B(NI_RTSI_BRD(1))]	= V(4),
+				[B(NI_RTSI_BRD(2))]	= V(4),
+				[B(NI_RTSI_BRD(3))]	= V(4),
+				[B(NI_CtrSource(0))]	= V(15),
+				[B(NI_CtrSource(1))]	= V(15),
+				[B(NI_CtrGate(0))]	= V(15),
+				[B(NI_CtrGate(1))]	= V(15),
+				[B(NI_CtrOut(0))]	= V(5),
+				[B(NI_AI_SampleClock)]	= V(15),
+				[B(NI_AI_SampleClockTimebase)]	= V(15),
+				[B(NI_AI_StartTrigger)]	= V(15),
+				[B(NI_AI_ReferenceTrigger)]	= V(15),
+				[B(NI_AI_ConvertClock)]	= V(15),
+				[B(NI_AI_PauseTrigger)]	= V(15),
+				[B(NI_AO_SampleClock)]	= V(15),
+				[B(NI_AO_SampleClockTimebase)]	= V(15),
+				[B(NI_AO_StartTrigger)]	= V(15),
+				[B(NI_AO_PauseTrigger)]	= V(15),
+			},
+			[B(TRIGGER_LINE(5))] = {
+				[B(NI_RTSI_BRD(0))]	= V(5),
+				[B(NI_RTSI_BRD(1))]	= V(5),
+				[B(NI_RTSI_BRD(2))]	= V(5),
+				[B(NI_RTSI_BRD(3))]	= V(5),
+				[B(NI_CtrSource(0))]	= V(16),
+				[B(NI_CtrSource(1))]	= V(16),
+				[B(NI_CtrGate(0))]	= V(16),
+				[B(NI_CtrGate(1))]	= V(16),
+				[B(NI_CtrOut(0))]	= V(6),
+				[B(NI_AI_SampleClock)]	= V(16),
+				[B(NI_AI_SampleClockTimebase)]	= V(16),
+				[B(NI_AI_StartTrigger)]	= V(16),
+				[B(NI_AI_ReferenceTrigger)]	= V(16),
+				[B(NI_AI_ConvertClock)]	= V(16),
+				[B(NI_AI_PauseTrigger)]	= V(16),
+				[B(NI_AO_SampleClock)]	= V(16),
+				[B(NI_AO_SampleClockTimebase)]	= V(16),
+				[B(NI_AO_StartTrigger)]	= V(16),
+				[B(NI_AO_PauseTrigger)]	= V(16),
+			},
+			[B(TRIGGER_LINE(6))] = {
+				[B(NI_RTSI_BRD(0))]	= V(6),
+				[B(NI_RTSI_BRD(1))]	= V(6),
+				[B(NI_RTSI_BRD(2))]	= V(6),
+				[B(NI_RTSI_BRD(3))]	= V(6),
+				[B(NI_CtrSource(0))]	= V(17),
+				[B(NI_CtrSource(1))]	= V(17),
+				[B(NI_CtrGate(0))]	= V(17),
+				[B(NI_CtrGate(1))]	= V(17),
+				[B(NI_CtrOut(0))]	= V(7),
+				[B(NI_AI_SampleClock)]	= V(17),
+				[B(NI_AI_SampleClockTimebase)]	= V(17),
+				[B(NI_AI_StartTrigger)]	= V(17),
+				[B(NI_AI_ReferenceTrigger)]	= V(17),
+				[B(NI_AI_ConvertClock)]	= V(17),
+				[B(NI_AI_PauseTrigger)]	= V(17),
+				[B(NI_AO_SampleClock)]	= V(17),
+				[B(NI_AO_SampleClockTimebase)]	= V(17),
+				[B(NI_AO_StartTrigger)]	= V(17),
+				[B(NI_AO_PauseTrigger)]	= V(17),
+			},
+			[B(TRIGGER_LINE(7))] = {
+				[B(NI_MasterTimebase)]	= V(1),
+			},
+			[B(NI_RTSI_BRD(0))] = {
+				[B(TRIGGER_LINE(0))]	= V(8),
+				[B(TRIGGER_LINE(1))]	= V(8),
+				[B(TRIGGER_LINE(2))]	= V(8),
+				[B(TRIGGER_LINE(3))]	= V(8),
+				[B(TRIGGER_LINE(4))]	= V(8),
+				[B(TRIGGER_LINE(5))]	= V(8),
+				[B(TRIGGER_LINE(6))]	= V(8),
+			},
+			[B(NI_RTSI_BRD(1))] = {
+				[B(TRIGGER_LINE(0))]	= V(9),
+				[B(TRIGGER_LINE(1))]	= V(9),
+				[B(TRIGGER_LINE(2))]	= V(9),
+				[B(TRIGGER_LINE(3))]	= V(9),
+				[B(TRIGGER_LINE(4))]	= V(9),
+				[B(TRIGGER_LINE(5))]	= V(9),
+				[B(TRIGGER_LINE(6))]	= V(9),
+			},
+			[B(NI_RTSI_BRD(2))] = {
+				[B(TRIGGER_LINE(0))]	= V(10),
+				[B(TRIGGER_LINE(1))]	= V(10),
+				[B(TRIGGER_LINE(2))]	= V(10),
+				[B(TRIGGER_LINE(3))]	= V(10),
+				[B(TRIGGER_LINE(4))]	= V(10),
+				[B(TRIGGER_LINE(5))]	= V(10),
+				[B(TRIGGER_LINE(6))]	= V(10),
+			},
+			[B(NI_RTSI_BRD(3))] = {
+				[B(TRIGGER_LINE(0))]	= V(11),
+				[B(TRIGGER_LINE(1))]	= V(11),
+				[B(TRIGGER_LINE(2))]	= V(11),
+				[B(TRIGGER_LINE(3))]	= V(11),
+				[B(TRIGGER_LINE(4))]	= V(11),
+				[B(TRIGGER_LINE(5))]	= V(11),
+				[B(TRIGGER_LINE(6))]	= V(11),
+			},
+			[B(NI_CtrSource(0))] = {
+				[B(NI_PFI(8))]	= V(NI_PFI_OUTPUT_G_SRC0),
+				[B(TRIGGER_LINE(0))]	= V(5),
+				[B(TRIGGER_LINE(1))]	= V(5),
+				[B(TRIGGER_LINE(2))]	= V(5),
+				[B(TRIGGER_LINE(3))]	= V(5),
+				[B(TRIGGER_LINE(4))]	= V(5),
+				[B(TRIGGER_LINE(5))]	= V(5),
+				[B(TRIGGER_LINE(6))]	= V(5),
+			},
+			[B(NI_CtrSource(1))] = {
+				[B(NI_PFI(3))]	= V(NI_PFI_OUTPUT_G_SRC1),
+			},
+			[B(NI_CtrGate(0))] = {
+				[B(NI_PFI(9))]	= V(NI_PFI_OUTPUT_G_GATE0),
+				[B(TRIGGER_LINE(0))]	= V(6),
+				[B(TRIGGER_LINE(1))]	= V(6),
+				[B(TRIGGER_LINE(2))]	= V(6),
+				[B(TRIGGER_LINE(3))]	= V(6),
+				[B(TRIGGER_LINE(4))]	= V(6),
+				[B(TRIGGER_LINE(5))]	= V(6),
+				[B(TRIGGER_LINE(6))]	= V(6),
+			},
+			[B(NI_CtrGate(1))] = {
+				[B(NI_PFI(4))]	= V(NI_PFI_OUTPUT_G_GATE1),
+			},
+			[B(NI_CtrInternalOutput(0))] = {
+				[B(NI_CtrSource(1))]	= V(19),
+				[B(NI_CtrGate(1))]	= V(20),
+				[B(NI_CtrOut(0))]	= V(0),
+				[B(NI_AI_SampleClock)]	= V(19),
+				[B(NI_AI_StartTrigger)]	= V(18),
+				[B(NI_AI_ConvertClock)]	= V(19),
+				[B(NI_RGOUT0)]	= V(0),
+			},
+			[B(NI_CtrInternalOutput(1))] = {
+				[B(NI_CtrSource(0))]	= V(19),
+				[B(NI_CtrGate(0))]	= V(20),
+				[B(NI_CtrOut(1))]	= V(0),
+				[B(NI_AO_SampleClock)]	= V(19),
+			},
+			[B(NI_CtrOut(0))] = {
+				[B(NI_RGOUT0)]	= V(1),
+			},
+			[B(PXI_Star)] = {
+				[B(NI_RTSI_BRD(0))]	= V(6),
+				[B(NI_RTSI_BRD(1))]	= V(6),
+				[B(NI_RTSI_BRD(2))]	= V(6),
+				[B(NI_RTSI_BRD(3))]	= V(6),
+				[B(NI_CtrSource(0))]	= V(17),
+				[B(NI_CtrSource(1))]	= V(17),
+				[B(NI_CtrGate(0))]	= V(17),
+				[B(NI_CtrGate(1))]	= V(17),
+				[B(NI_CtrOut(0))]	= V(7),
+				[B(NI_AI_SampleClock)]	= V(17),
+				[B(NI_AI_SampleClockTimebase)]	= V(17),
+				[B(NI_AI_StartTrigger)]	= V(17),
+				[B(NI_AI_ReferenceTrigger)]	= V(17),
+				[B(NI_AI_ConvertClock)]	= V(17),
+				[B(NI_AI_PauseTrigger)]	= V(17),
+				[B(NI_AO_SampleClock)]	= V(17),
+				[B(NI_AO_SampleClockTimebase)]	= V(17),
+				[B(NI_AO_StartTrigger)]	= V(17),
+				[B(NI_AO_PauseTrigger)]	= V(17),
+				[B(NI_MasterTimebase)]	= V(2),
+			},
+			[B(PXI_Clk10)] = {
+				[B(NI_MasterTimebase)]	= V(3),
+			},
+			[B(NI_AI_SampleClock)] = {
+				[B(NI_PFI(7))]	= V(NI_PFI_OUTPUT_AI_START_PULSE),
+				[B(NI_RTSI_BRD(2))]	= V(7),
+				[B(NI_RTSI_BRD(3))]	= V(7),
+			},
+			[B(NI_AI_SampleClockTimebase)] = {
+				[B(NI_AI_SampleClock)]	= V(0),
+				[B(NI_AI_ConvertClockTimebase)]	= V(0),
+			},
+			[B(NI_AI_StartTrigger)] = {
+				[B(NI_PFI(0))]	= V(NI_PFI_OUTPUT_AI_START1),
+				[B(TRIGGER_LINE(0))]	= V(0),
+				[B(TRIGGER_LINE(1))]	= V(0),
+				[B(TRIGGER_LINE(2))]	= V(0),
+				[B(TRIGGER_LINE(3))]	= V(0),
+				[B(TRIGGER_LINE(4))]	= V(0),
+				[B(TRIGGER_LINE(5))]	= V(0),
+				[B(TRIGGER_LINE(6))]	= V(0),
+				[B(NI_CtrGate(0))]	= V(21),
+				[B(NI_CtrGate(1))]	= V(21),
+				[B(NI_AO_StartTrigger)]	= V(18),
+			},
+			[B(NI_AI_ReferenceTrigger)] = {
+				[B(NI_PFI(1))]	= V(NI_PFI_OUTPUT_AI_START2),
+				[B(TRIGGER_LINE(0))]	= V(1),
+				[B(TRIGGER_LINE(1))]	= V(1),
+				[B(TRIGGER_LINE(2))]	= V(1),
+				[B(TRIGGER_LINE(3))]	= V(1),
+				[B(TRIGGER_LINE(4))]	= V(1),
+				[B(TRIGGER_LINE(5))]	= V(1),
+				[B(TRIGGER_LINE(6))]	= V(1),
+				[B(NI_CtrGate(0))]	= V(18),
+				[B(NI_CtrGate(1))]	= V(18),
+			},
+			[B(NI_AI_ConvertClock)] = {
+				[B(NI_PFI(2))]	= V(NI_PFI_OUTPUT_AI_CONVERT),
+				[B(TRIGGER_LINE(0))]	= V(2),
+				[B(TRIGGER_LINE(1))]	= V(2),
+				[B(TRIGGER_LINE(2))]	= V(2),
+				[B(TRIGGER_LINE(3))]	= V(2),
+				[B(TRIGGER_LINE(4))]	= V(2),
+				[B(TRIGGER_LINE(5))]	= V(2),
+				[B(TRIGGER_LINE(6))]	= V(2),
+			},
+			[B(NI_AI_ConvertClockTimebase)] = {
+				[B(NI_AI_ConvertClock)]	= V(0),
+			},
+			[B(NI_AO_SampleClock)] = {
+				[B(NI_PFI(5))]	= V(NI_PFI_OUTPUT_AO_UPDATE_N),
+				[B(TRIGGER_LINE(0))]	= V(3),
+				[B(TRIGGER_LINE(1))]	= V(3),
+				[B(TRIGGER_LINE(2))]	= V(3),
+				[B(TRIGGER_LINE(3))]	= V(3),
+				[B(TRIGGER_LINE(4))]	= V(3),
+				[B(TRIGGER_LINE(5))]	= V(3),
+				[B(TRIGGER_LINE(6))]	= V(3),
+			},
+			[B(NI_AO_SampleClockTimebase)] = {
+				[B(NI_AO_SampleClock)]	= V(0),
+			},
+			[B(NI_AO_StartTrigger)] = {
+				[B(NI_PFI(6))]	= V(NI_PFI_OUTPUT_AO_START1),
+				[B(TRIGGER_LINE(0))]	= V(4),
+				[B(TRIGGER_LINE(1))]	= V(4),
+				[B(TRIGGER_LINE(2))]	= V(4),
+				[B(TRIGGER_LINE(3))]	= V(4),
+				[B(TRIGGER_LINE(4))]	= V(4),
+				[B(TRIGGER_LINE(5))]	= V(4),
+				[B(TRIGGER_LINE(6))]	= V(4),
+			},
+			[B(NI_20MHzTimebase)] = {
+				[B(TRIGGER_LINE(7))]	= V(NI_RTSI_OUTPUT_RTSI_OSC),
+				[B(NI_CtrSource(0))]	= V(0),
+				[B(NI_CtrSource(1))]	= V(0),
+				[B(NI_AI_SampleClockTimebase)]	= V(0),
+				[B(NI_AI_ConvertClockTimebase)]	= V(1),
+				[B(NI_AO_SampleClockTimebase)]	= V(0),
+			},
+			[B(NI_100kHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(18),
+				[B(NI_CtrSource(1))]	= V(18),
+				[B(NI_AI_SampleClockTimebase)]	= V(19),
+				[B(NI_AO_SampleClockTimebase)]	= V(19),
+			},
+			[B(NI_10MHzRefClock)] = {
+				[B(NI_MasterTimebase)]	= V(0),
+			},
+			[B(NI_LogicLow)] = {
+				[B(NI_CtrSource(0))]	= V(31),
+				[B(NI_CtrSource(1))]	= V(31),
+				[B(NI_CtrGate(0))]	= V(31),
+				[B(NI_CtrGate(1))]	= V(31),
+				[B(NI_AI_SampleClock)]	= V(31),
+				[B(NI_AI_SampleClockTimebase)]	= V(31),
+				[B(NI_AI_StartTrigger)]	= V(31),
+				[B(NI_AI_ReferenceTrigger)]	= V(31),
+				[B(NI_AI_ConvertClock)]	= V(31),
+				[B(NI_AI_PauseTrigger)]	= V(31),
+				[B(NI_AO_SampleClock)]	= V(31),
+				[B(NI_AO_SampleClockTimebase)]	= V(31),
+				[B(NI_AO_StartTrigger)]	= V(31),
+				[B(NI_AO_PauseTrigger)]	= V(31),
+			},
+			[B(NI_AI_STOP)] = {
+				[B(NI_RTSI_BRD(0))]	= V(7),
+				[B(NI_RTSI_BRD(1))]	= V(7),
+			},
+			[B(NI_RGOUT0)] = {
+				[B(TRIGGER_LINE(0))]	= V(7),
+				[B(TRIGGER_LINE(1))]	= V(7),
+				[B(TRIGGER_LINE(2))]	= V(7),
+				[B(TRIGGER_LINE(3))]	= V(7),
+				[B(TRIGGER_LINE(4))]	= V(7),
+				[B(TRIGGER_LINE(5))]	= V(7),
+				[B(TRIGGER_LINE(6))]	= V(7),
+			},
+		},
+	},
+	{
+		.family = "ni_mseries",
+		.register_values = {
+			[B(NI_PFI(0))] = {
+				[B(NI_RTSI_BRD(0))]	= V(0),
+				[B(NI_RTSI_BRD(1))]	= V(0),
+				[B(NI_RTSI_BRD(2))]	= V(0),
+				[B(NI_RTSI_BRD(3))]	= V(0),
+				[B(NI_CtrSource(0))]	= V(1),
+				[B(NI_CtrSource(1))]	= V(1),
+				[B(NI_CtrGate(0))]	= V(1 /* source:  mhddk examples */),
+				[B(NI_CtrGate(1))]	= V(1 /* source:  mhddk examples */),
+				[B(NI_CtrAux(0))]	= V(1),
+				[B(NI_CtrAux(1))]	= V(1),
+				[B(NI_CtrA(0))]	= V(1),
+				[B(NI_CtrA(1))]	= V(1),
+				[B(NI_CtrB(0))]	= V(1),
+				[B(NI_CtrB(1))]	= V(1),
+				[B(NI_CtrZ(0))]	= V(1),
+				[B(NI_CtrZ(1))]	= V(1),
+				[B(NI_AI_SampleClock)]	= V(1),
+				[B(NI_AI_SampleClockTimebase)]	= V(1),
+				[B(NI_AI_StartTrigger)]	= V(1),
+				[B(NI_AI_ReferenceTrigger)]	= V(1),
+				[B(NI_AI_ConvertClock)]	= V(1),
+				[B(NI_AI_PauseTrigger)]	= V(1),
+				[B(NI_AO_SampleClock)]	= V(1),
+				[B(NI_AO_SampleClockTimebase)]	= V(1),
+				[B(NI_AO_StartTrigger)]	= V(1),
+				[B(NI_AO_PauseTrigger)]	= V(1),
+				[B(NI_DI_SampleClock)]	= V(1),
+				[B(NI_DO_SampleClock)]	= V(1),
+			},
+			[B(NI_PFI(1))] = {
+				[B(NI_RTSI_BRD(0))]	= V(1),
+				[B(NI_RTSI_BRD(1))]	= V(1),
+				[B(NI_RTSI_BRD(2))]	= V(1),
+				[B(NI_RTSI_BRD(3))]	= V(1),
+				[B(NI_CtrSource(0))]	= V(2),
+				[B(NI_CtrSource(1))]	= V(2),
+				[B(NI_CtrGate(0))]	= V(2),
+				[B(NI_CtrGate(1))]	= V(2),
+				[B(NI_CtrAux(0))]	= V(2),
+				[B(NI_CtrAux(1))]	= V(2),
+				[B(NI_CtrA(0))]	= V(2),
+				[B(NI_CtrA(1))]	= V(2),
+				[B(NI_CtrB(0))]	= V(2),
+				[B(NI_CtrB(1))]	= V(2),
+				[B(NI_CtrZ(0))]	= V(2),
+				[B(NI_CtrZ(1))]	= V(2),
+				[B(NI_AI_SampleClock)]	= V(2),
+				[B(NI_AI_SampleClockTimebase)]	= V(2),
+				[B(NI_AI_StartTrigger)]	= V(2),
+				[B(NI_AI_ReferenceTrigger)]	= V(2),
+				[B(NI_AI_ConvertClock)]	= V(2),
+				[B(NI_AI_PauseTrigger)]	= V(2),
+				[B(NI_AO_SampleClock)]	= V(2),
+				[B(NI_AO_SampleClockTimebase)]	= V(2),
+				[B(NI_AO_StartTrigger)]	= V(2),
+				[B(NI_AO_PauseTrigger)]	= V(2),
+				[B(NI_DI_SampleClock)]	= V(2),
+				[B(NI_DO_SampleClock)]	= V(2),
+			},
+			[B(NI_PFI(2))] = {
+				[B(NI_RTSI_BRD(0))]	= V(2),
+				[B(NI_RTSI_BRD(1))]	= V(2),
+				[B(NI_RTSI_BRD(2))]	= V(2),
+				[B(NI_RTSI_BRD(3))]	= V(2),
+				[B(NI_CtrSource(0))]	= V(3),
+				[B(NI_CtrSource(1))]	= V(3),
+				[B(NI_CtrGate(0))]	= V(3),
+				[B(NI_CtrGate(1))]	= V(3),
+				[B(NI_CtrAux(0))]	= V(3),
+				[B(NI_CtrAux(1))]	= V(3),
+				[B(NI_CtrA(0))]	= V(3),
+				[B(NI_CtrA(1))]	= V(3),
+				[B(NI_CtrB(0))]	= V(3),
+				[B(NI_CtrB(1))]	= V(3),
+				[B(NI_CtrZ(0))]	= V(3),
+				[B(NI_CtrZ(1))]	= V(3),
+				[B(NI_AI_SampleClock)]	= V(3),
+				[B(NI_AI_SampleClockTimebase)]	= V(3),
+				[B(NI_AI_StartTrigger)]	= V(3),
+				[B(NI_AI_ReferenceTrigger)]	= V(3),
+				[B(NI_AI_ConvertClock)]	= V(3),
+				[B(NI_AI_PauseTrigger)]	= V(3),
+				[B(NI_AO_SampleClock)]	= V(3),
+				[B(NI_AO_SampleClockTimebase)]	= V(3),
+				[B(NI_AO_StartTrigger)]	= V(3),
+				[B(NI_AO_PauseTrigger)]	= V(3),
+				[B(NI_DI_SampleClock)]	= V(3),
+				[B(NI_DO_SampleClock)]	= V(3),
+			},
+			[B(NI_PFI(3))] = {
+				[B(NI_RTSI_BRD(0))]	= V(3),
+				[B(NI_RTSI_BRD(1))]	= V(3),
+				[B(NI_RTSI_BRD(2))]	= V(3),
+				[B(NI_RTSI_BRD(3))]	= V(3),
+				[B(NI_CtrSource(0))]	= V(4),
+				[B(NI_CtrSource(1))]	= V(4),
+				[B(NI_CtrGate(0))]	= V(4),
+				[B(NI_CtrGate(1))]	= V(4),
+				[B(NI_CtrAux(0))]	= V(4),
+				[B(NI_CtrAux(1))]	= V(4),
+				[B(NI_CtrA(0))]	= V(4),
+				[B(NI_CtrA(1))]	= V(4),
+				[B(NI_CtrB(0))]	= V(4),
+				[B(NI_CtrB(1))]	= V(4),
+				[B(NI_CtrZ(0))]	= V(4),
+				[B(NI_CtrZ(1))]	= V(4),
+				[B(NI_AI_SampleClock)]	= V(4),
+				[B(NI_AI_SampleClockTimebase)]	= V(4),
+				[B(NI_AI_StartTrigger)]	= V(4),
+				[B(NI_AI_ReferenceTrigger)]	= V(4),
+				[B(NI_AI_ConvertClock)]	= V(4),
+				[B(NI_AI_PauseTrigger)]	= V(4),
+				[B(NI_AO_SampleClock)]	= V(4),
+				[B(NI_AO_SampleClockTimebase)]	= V(4),
+				[B(NI_AO_StartTrigger)]	= V(4),
+				[B(NI_AO_PauseTrigger)]	= V(4),
+				[B(NI_DI_SampleClock)]	= V(4),
+				[B(NI_DO_SampleClock)]	= V(4),
+			},
+			[B(NI_PFI(4))] = {
+				[B(NI_RTSI_BRD(0))]	= V(4),
+				[B(NI_RTSI_BRD(1))]	= V(4),
+				[B(NI_RTSI_BRD(2))]	= V(4),
+				[B(NI_RTSI_BRD(3))]	= V(4),
+				[B(NI_CtrSource(0))]	= V(5),
+				[B(NI_CtrSource(1))]	= V(5),
+				[B(NI_CtrGate(0))]	= V(5),
+				[B(NI_CtrGate(1))]	= V(5),
+				[B(NI_CtrAux(0))]	= V(5),
+				[B(NI_CtrAux(1))]	= V(5),
+				[B(NI_CtrA(0))]	= V(5),
+				[B(NI_CtrA(1))]	= V(5),
+				[B(NI_CtrB(0))]	= V(5),
+				[B(NI_CtrB(1))]	= V(5),
+				[B(NI_CtrZ(0))]	= V(5),
+				[B(NI_CtrZ(1))]	= V(5),
+				[B(NI_AI_SampleClock)]	= V(5),
+				[B(NI_AI_SampleClockTimebase)]	= V(5),
+				[B(NI_AI_StartTrigger)]	= V(5),
+				[B(NI_AI_ReferenceTrigger)]	= V(5),
+				[B(NI_AI_ConvertClock)]	= V(5),
+				[B(NI_AI_PauseTrigger)]	= V(5),
+				[B(NI_AO_SampleClock)]	= V(5),
+				[B(NI_AO_SampleClockTimebase)]	= V(5),
+				[B(NI_AO_StartTrigger)]	= V(5),
+				[B(NI_AO_PauseTrigger)]	= V(5),
+				[B(NI_DI_SampleClock)]	= V(5),
+				[B(NI_DO_SampleClock)]	= V(5),
+			},
+			[B(NI_PFI(5))] = {
+				[B(NI_RTSI_BRD(0))]	= V(5),
+				[B(NI_RTSI_BRD(1))]	= V(5),
+				[B(NI_RTSI_BRD(2))]	= V(5),
+				[B(NI_RTSI_BRD(3))]	= V(5),
+				[B(NI_CtrSource(0))]	= V(6),
+				[B(NI_CtrSource(1))]	= V(6),
+				[B(NI_CtrGate(0))]	= V(6),
+				[B(NI_CtrGate(1))]	= V(6),
+				[B(NI_CtrAux(0))]	= V(6),
+				[B(NI_CtrAux(1))]	= V(6),
+				[B(NI_CtrA(0))]	= V(6),
+				[B(NI_CtrA(1))]	= V(6),
+				[B(NI_CtrB(0))]	= V(6),
+				[B(NI_CtrB(1))]	= V(6),
+				[B(NI_CtrZ(0))]	= V(6),
+				[B(NI_CtrZ(1))]	= V(6),
+				[B(NI_AI_SampleClock)]	= V(6),
+				[B(NI_AI_SampleClockTimebase)]	= V(6),
+				[B(NI_AI_StartTrigger)]	= V(6),
+				[B(NI_AI_ReferenceTrigger)]	= V(6),
+				[B(NI_AI_ConvertClock)]	= V(6),
+				[B(NI_AI_PauseTrigger)]	= V(6),
+				[B(NI_AO_SampleClock)]	= V(6),
+				[B(NI_AO_SampleClockTimebase)]	= V(6),
+				[B(NI_AO_StartTrigger)]	= V(6),
+				[B(NI_AO_PauseTrigger)]	= V(6),
+				[B(NI_DI_SampleClock)]	= V(6),
+				[B(NI_DO_SampleClock)]	= V(6),
+			},
+			[B(NI_PFI(6))] = {
+				[B(NI_CtrSource(0))]	= V(7),
+				[B(NI_CtrSource(1))]	= V(7),
+				[B(NI_CtrGate(0))]	= V(7),
+				[B(NI_CtrGate(1))]	= V(7),
+				[B(NI_CtrAux(0))]	= V(7),
+				[B(NI_CtrAux(1))]	= V(7),
+				[B(NI_CtrA(0))]	= V(7),
+				[B(NI_CtrA(1))]	= V(7),
+				[B(NI_CtrB(0))]	= V(7),
+				[B(NI_CtrB(1))]	= V(7),
+				[B(NI_CtrZ(0))]	= V(7),
+				[B(NI_CtrZ(1))]	= V(7),
+				[B(NI_AI_SampleClock)]	= V(7),
+				[B(NI_AI_SampleClockTimebase)]	= V(7),
+				[B(NI_AI_StartTrigger)]	= V(7),
+				[B(NI_AI_ReferenceTrigger)]	= V(7),
+				[B(NI_AI_ConvertClock)]	= V(7),
+				[B(NI_AI_PauseTrigger)]	= V(7),
+				[B(NI_AO_SampleClock)]	= V(7),
+				[B(NI_AO_SampleClockTimebase)]	= V(7),
+				[B(NI_AO_StartTrigger)]	= V(7),
+				[B(NI_AO_PauseTrigger)]	= V(7),
+				[B(NI_DI_SampleClock)]	= V(7),
+				[B(NI_DO_SampleClock)]	= V(7),
+			},
+			[B(NI_PFI(7))] = {
+				[B(NI_CtrSource(0))]	= V(8),
+				[B(NI_CtrSource(1))]	= V(8),
+				[B(NI_CtrGate(0))]	= V(8),
+				[B(NI_CtrGate(1))]	= V(8),
+				[B(NI_CtrAux(0))]	= V(8),
+				[B(NI_CtrAux(1))]	= V(8),
+				[B(NI_CtrA(0))]	= V(8),
+				[B(NI_CtrA(1))]	= V(8),
+				[B(NI_CtrB(0))]	= V(8),
+				[B(NI_CtrB(1))]	= V(8),
+				[B(NI_CtrZ(0))]	= V(8),
+				[B(NI_CtrZ(1))]	= V(8),
+				[B(NI_AI_SampleClock)]	= V(8),
+				[B(NI_AI_SampleClockTimebase)]	= V(8),
+				[B(NI_AI_StartTrigger)]	= V(8),
+				[B(NI_AI_ReferenceTrigger)]	= V(8),
+				[B(NI_AI_ConvertClock)]	= V(8),
+				[B(NI_AI_PauseTrigger)]	= V(8),
+				[B(NI_AO_SampleClock)]	= V(8),
+				[B(NI_AO_SampleClockTimebase)]	= V(8),
+				[B(NI_AO_StartTrigger)]	= V(8),
+				[B(NI_AO_PauseTrigger)]	= V(8),
+				[B(NI_DI_SampleClock)]	= V(8),
+				[B(NI_DO_SampleClock)]	= V(8),
+			},
+			[B(NI_PFI(8))] = {
+				[B(NI_CtrSource(0))]	= V(9),
+				[B(NI_CtrSource(1))]	= V(9),
+				[B(NI_CtrGate(0))]	= V(9),
+				[B(NI_CtrGate(1))]	= V(9),
+				[B(NI_CtrAux(0))]	= V(9),
+				[B(NI_CtrAux(1))]	= V(9),
+				[B(NI_CtrA(0))]	= V(9),
+				[B(NI_CtrA(1))]	= V(9),
+				[B(NI_CtrB(0))]	= V(9),
+				[B(NI_CtrB(1))]	= V(9),
+				[B(NI_CtrZ(0))]	= V(9),
+				[B(NI_CtrZ(1))]	= V(9),
+				[B(NI_AI_SampleClock)]	= V(9),
+				[B(NI_AI_SampleClockTimebase)]	= V(9),
+				[B(NI_AI_StartTrigger)]	= V(9),
+				[B(NI_AI_ReferenceTrigger)]	= V(9),
+				[B(NI_AI_ConvertClock)]	= V(9),
+				[B(NI_AI_PauseTrigger)]	= V(9),
+				[B(NI_AO_SampleClock)]	= V(9),
+				[B(NI_AO_SampleClockTimebase)]	= V(9),
+				[B(NI_AO_StartTrigger)]	= V(9),
+				[B(NI_AO_PauseTrigger)]	= V(9),
+				[B(NI_DI_SampleClock)]	= V(9),
+				[B(NI_DO_SampleClock)]	= V(9),
+			},
+			[B(NI_PFI(9))] = {
+				[B(NI_CtrSource(0))]	= V(10),
+				[B(NI_CtrSource(1))]	= V(10),
+				[B(NI_CtrGate(0))]	= V(10),
+				[B(NI_CtrGate(1))]	= V(10),
+				[B(NI_CtrAux(0))]	= V(10),
+				[B(NI_CtrAux(1))]	= V(10),
+				[B(NI_CtrA(0))]	= V(10),
+				[B(NI_CtrA(1))]	= V(10),
+				[B(NI_CtrB(0))]	= V(10),
+				[B(NI_CtrB(1))]	= V(10),
+				[B(NI_CtrZ(0))]	= V(10),
+				[B(NI_CtrZ(1))]	= V(10),
+				[B(NI_AI_SampleClock)]	= V(10),
+				[B(NI_AI_SampleClockTimebase)]	= V(10),
+				[B(NI_AI_StartTrigger)]	= V(10),
+				[B(NI_AI_ReferenceTrigger)]	= V(10),
+				[B(NI_AI_ConvertClock)]	= V(10),
+				[B(NI_AI_PauseTrigger)]	= V(10),
+				[B(NI_AO_SampleClock)]	= V(10),
+				[B(NI_AO_SampleClockTimebase)]	= V(10),
+				[B(NI_AO_StartTrigger)]	= V(10),
+				[B(NI_AO_PauseTrigger)]	= V(10),
+				[B(NI_DI_SampleClock)]	= V(10),
+				[B(NI_DO_SampleClock)]	= V(10),
+			},
+			[B(NI_PFI(10))] = {
+				[B(NI_CtrSource(0))]	= V(21),
+				[B(NI_CtrSource(1))]	= V(21),
+				[B(NI_CtrGate(0))]	= V(21),
+				[B(NI_CtrGate(1))]	= V(21),
+				[B(NI_CtrAux(0))]	= V(21),
+				[B(NI_CtrAux(1))]	= V(21),
+				[B(NI_CtrA(0))]	= V(21),
+				[B(NI_CtrA(1))]	= V(21),
+				[B(NI_CtrB(0))]	= V(21),
+				[B(NI_CtrB(1))]	= V(21),
+				[B(NI_CtrZ(0))]	= V(21),
+				[B(NI_CtrZ(1))]	= V(21),
+				[B(NI_AI_SampleClock)]	= V(21),
+				[B(NI_AI_SampleClockTimebase)]	= V(21),
+				[B(NI_AI_StartTrigger)]	= V(21),
+				[B(NI_AI_ReferenceTrigger)]	= V(21),
+				[B(NI_AI_ConvertClock)]	= V(21),
+				[B(NI_AI_PauseTrigger)]	= V(21),
+				[B(NI_AO_SampleClock)]	= V(21),
+				[B(NI_AO_SampleClockTimebase)]	= V(21),
+				[B(NI_AO_StartTrigger)]	= V(21),
+				[B(NI_AO_PauseTrigger)]	= V(21),
+				[B(NI_DI_SampleClock)]	= V(21),
+				[B(NI_DO_SampleClock)]	= V(21),
+			},
+			[B(NI_PFI(11))] = {
+				[B(NI_CtrSource(0))]	= V(22),
+				[B(NI_CtrSource(1))]	= V(22),
+				[B(NI_CtrGate(0))]	= V(22),
+				[B(NI_CtrGate(1))]	= V(22),
+				[B(NI_CtrAux(0))]	= V(22),
+				[B(NI_CtrAux(1))]	= V(22),
+				[B(NI_CtrA(0))]	= V(22),
+				[B(NI_CtrA(1))]	= V(22),
+				[B(NI_CtrB(0))]	= V(22),
+				[B(NI_CtrB(1))]	= V(22),
+				[B(NI_CtrZ(0))]	= V(22),
+				[B(NI_CtrZ(1))]	= V(22),
+				[B(NI_AI_SampleClock)]	= V(22),
+				[B(NI_AI_SampleClockTimebase)]	= V(22),
+				[B(NI_AI_StartTrigger)]	= V(22),
+				[B(NI_AI_ReferenceTrigger)]	= V(22),
+				[B(NI_AI_ConvertClock)]	= V(22),
+				[B(NI_AI_PauseTrigger)]	= V(22),
+				[B(NI_AO_SampleClock)]	= V(22),
+				[B(NI_AO_SampleClockTimebase)]	= V(22),
+				[B(NI_AO_StartTrigger)]	= V(22),
+				[B(NI_AO_PauseTrigger)]	= V(22),
+				[B(NI_DI_SampleClock)]	= V(22),
+				[B(NI_DO_SampleClock)]	= V(22),
+			},
+			[B(NI_PFI(12))] = {
+				[B(NI_CtrSource(0))]	= V(23),
+				[B(NI_CtrSource(1))]	= V(23),
+				[B(NI_CtrGate(0))]	= V(23),
+				[B(NI_CtrGate(1))]	= V(23),
+				[B(NI_CtrAux(0))]	= V(23),
+				[B(NI_CtrAux(1))]	= V(23),
+				[B(NI_CtrA(0))]	= V(23),
+				[B(NI_CtrA(1))]	= V(23),
+				[B(NI_CtrB(0))]	= V(23),
+				[B(NI_CtrB(1))]	= V(23),
+				[B(NI_CtrZ(0))]	= V(23),
+				[B(NI_CtrZ(1))]	= V(23),
+				[B(NI_AI_SampleClock)]	= V(23),
+				[B(NI_AI_SampleClockTimebase)]	= V(23),
+				[B(NI_AI_StartTrigger)]	= V(23),
+				[B(NI_AI_ReferenceTrigger)]	= V(23),
+				[B(NI_AI_ConvertClock)]	= V(23),
+				[B(NI_AI_PauseTrigger)]	= V(23),
+				[B(NI_AO_SampleClock)]	= V(23),
+				[B(NI_AO_SampleClockTimebase)]	= V(23),
+				[B(NI_AO_StartTrigger)]	= V(23),
+				[B(NI_AO_PauseTrigger)]	= V(23),
+				[B(NI_DI_SampleClock)]	= V(23),
+				[B(NI_DO_SampleClock)]	= V(23),
+			},
+			[B(NI_PFI(13))] = {
+				[B(NI_CtrSource(0))]	= V(24),
+				[B(NI_CtrSource(1))]	= V(24),
+				[B(NI_CtrGate(0))]	= V(24),
+				[B(NI_CtrGate(1))]	= V(24),
+				[B(NI_CtrAux(0))]	= V(24),
+				[B(NI_CtrAux(1))]	= V(24),
+				[B(NI_CtrA(0))]	= V(24),
+				[B(NI_CtrA(1))]	= V(24),
+				[B(NI_CtrB(0))]	= V(24),
+				[B(NI_CtrB(1))]	= V(24),
+				[B(NI_CtrZ(0))]	= V(24),
+				[B(NI_CtrZ(1))]	= V(24),
+				[B(NI_AI_SampleClock)]	= V(24),
+				[B(NI_AI_SampleClockTimebase)]	= V(24),
+				[B(NI_AI_StartTrigger)]	= V(24),
+				[B(NI_AI_ReferenceTrigger)]	= V(24),
+				[B(NI_AI_ConvertClock)]	= V(24),
+				[B(NI_AI_PauseTrigger)]	= V(24),
+				[B(NI_AO_SampleClock)]	= V(24),
+				[B(NI_AO_SampleClockTimebase)]	= V(24),
+				[B(NI_AO_StartTrigger)]	= V(24),
+				[B(NI_AO_PauseTrigger)]	= V(24),
+				[B(NI_DI_SampleClock)]	= V(24),
+				[B(NI_DO_SampleClock)]	= V(24),
+			},
+			[B(NI_PFI(14))] = {
+				[B(NI_CtrSource(0))]	= V(25),
+				[B(NI_CtrSource(1))]	= V(25),
+				[B(NI_CtrGate(0))]	= V(25),
+				[B(NI_CtrGate(1))]	= V(25),
+				[B(NI_CtrAux(0))]	= V(25),
+				[B(NI_CtrAux(1))]	= V(25),
+				[B(NI_CtrA(0))]	= V(25),
+				[B(NI_CtrA(1))]	= V(25),
+				[B(NI_CtrB(0))]	= V(25),
+				[B(NI_CtrB(1))]	= V(25),
+				[B(NI_CtrZ(0))]	= V(25),
+				[B(NI_CtrZ(1))]	= V(25),
+				[B(NI_AI_SampleClock)]	= V(25),
+				[B(NI_AI_SampleClockTimebase)]	= V(25),
+				[B(NI_AI_StartTrigger)]	= V(25),
+				[B(NI_AI_ReferenceTrigger)]	= V(25),
+				[B(NI_AI_ConvertClock)]	= V(25),
+				[B(NI_AI_PauseTrigger)]	= V(25),
+				[B(NI_AO_SampleClock)]	= V(25),
+				[B(NI_AO_SampleClockTimebase)]	= V(25),
+				[B(NI_AO_StartTrigger)]	= V(25),
+				[B(NI_AO_PauseTrigger)]	= V(25),
+				[B(NI_DI_SampleClock)]	= V(25),
+				[B(NI_DO_SampleClock)]	= V(25),
+			},
+			[B(NI_PFI(15))] = {
+				[B(NI_CtrSource(0))]	= V(26),
+				[B(NI_CtrSource(1))]	= V(26),
+				[B(NI_CtrGate(0))]	= V(26),
+				[B(NI_CtrGate(1))]	= V(26),
+				[B(NI_CtrAux(0))]	= V(26),
+				[B(NI_CtrAux(1))]	= V(26),
+				[B(NI_CtrA(0))]	= V(26),
+				[B(NI_CtrA(1))]	= V(26),
+				[B(NI_CtrB(0))]	= V(26),
+				[B(NI_CtrB(1))]	= V(26),
+				[B(NI_CtrZ(0))]	= V(26),
+				[B(NI_CtrZ(1))]	= V(26),
+				[B(NI_AI_SampleClock)]	= V(26),
+				[B(NI_AI_SampleClockTimebase)]	= V(26),
+				[B(NI_AI_StartTrigger)]	= V(26),
+				[B(NI_AI_ReferenceTrigger)]	= V(26),
+				[B(NI_AI_ConvertClock)]	= V(26),
+				[B(NI_AI_PauseTrigger)]	= V(26),
+				[B(NI_AO_SampleClock)]	= V(26),
+				[B(NI_AO_SampleClockTimebase)]	= V(26),
+				[B(NI_AO_StartTrigger)]	= V(26),
+				[B(NI_AO_PauseTrigger)]	= V(26),
+				[B(NI_DI_SampleClock)]	= V(26),
+				[B(NI_DO_SampleClock)]	= V(26),
+			},
+			[B(TRIGGER_LINE(0))] = {
+				[B(NI_PFI(0))]	= V(18),
+				[B(NI_PFI(1))]	= V(18),
+				[B(NI_PFI(2))]	= V(18),
+				[B(NI_PFI(3))]	= V(18),
+				[B(NI_PFI(4))]	= V(18),
+				[B(NI_PFI(5))]	= V(18),
+				[B(NI_PFI(6))]	= V(18),
+				[B(NI_PFI(7))]	= V(18),
+				[B(NI_PFI(8))]	= V(18),
+				[B(NI_PFI(9))]	= V(18),
+				[B(NI_PFI(10))]	= V(18),
+				[B(NI_PFI(11))]	= V(18),
+				[B(NI_PFI(12))]	= V(18),
+				[B(NI_PFI(13))]	= V(18),
+				[B(NI_PFI(14))]	= V(18),
+				[B(NI_PFI(15))]	= V(18),
+				[B(NI_CtrSource(0))]	= V(11),
+				[B(NI_CtrSource(1))]	= V(11),
+				[B(NI_CtrGate(0))]	= V(11),
+				[B(NI_CtrGate(1))]	= V(11),
+				[B(NI_CtrAux(0))]	= V(11),
+				[B(NI_CtrAux(1))]	= V(11),
+				[B(NI_CtrA(0))]	= V(11),
+				[B(NI_CtrA(1))]	= V(11),
+				[B(NI_CtrB(0))]	= V(11),
+				[B(NI_CtrB(1))]	= V(11),
+				[B(NI_CtrZ(0))]	= V(11),
+				[B(NI_CtrZ(1))]	= V(11),
+				[B(NI_CtrOut(0))]	= V(1),
+				[B(NI_AI_SampleClock)]	= V(11),
+				[B(NI_AI_SampleClockTimebase)]	= V(11),
+				[B(NI_AI_StartTrigger)]	= V(11),
+				[B(NI_AI_ReferenceTrigger)]	= V(11),
+				[B(NI_AI_ConvertClock)]	= V(11),
+				[B(NI_AI_PauseTrigger)]	= V(11),
+				[B(NI_AO_SampleClock)]	= V(11),
+				[B(NI_AO_SampleClockTimebase)]	= V(11),
+				[B(NI_AO_StartTrigger)]	= V(11),
+				[B(NI_AO_PauseTrigger)]	= V(11),
+				[B(NI_DI_SampleClock)]	= V(11),
+				[B(NI_DO_SampleClock)]	= V(11),
+				[B(NI_MasterTimebase)]	= V(11),
+			},
+			[B(TRIGGER_LINE(1))] = {
+				[B(NI_PFI(0))]	= V(19),
+				[B(NI_PFI(1))]	= V(19),
+				[B(NI_PFI(2))]	= V(19),
+				[B(NI_PFI(3))]	= V(19),
+				[B(NI_PFI(4))]	= V(19),
+				[B(NI_PFI(5))]	= V(19),
+				[B(NI_PFI(6))]	= V(19),
+				[B(NI_PFI(7))]	= V(19),
+				[B(NI_PFI(8))]	= V(19),
+				[B(NI_PFI(9))]	= V(19),
+				[B(NI_PFI(10))]	= V(19),
+				[B(NI_PFI(11))]	= V(19),
+				[B(NI_PFI(12))]	= V(19),
+				[B(NI_PFI(13))]	= V(19),
+				[B(NI_PFI(14))]	= V(19),
+				[B(NI_PFI(15))]	= V(19),
+				[B(NI_CtrSource(0))]	= V(12),
+				[B(NI_CtrSource(1))]	= V(12),
+				[B(NI_CtrGate(0))]	= V(12),
+				[B(NI_CtrGate(1))]	= V(12),
+				[B(NI_CtrAux(0))]	= V(12),
+				[B(NI_CtrAux(1))]	= V(12),
+				[B(NI_CtrA(0))]	= V(12),
+				[B(NI_CtrA(1))]	= V(12),
+				[B(NI_CtrB(0))]	= V(12),
+				[B(NI_CtrB(1))]	= V(12),
+				[B(NI_CtrZ(0))]	= V(12),
+				[B(NI_CtrZ(1))]	= V(12),
+				[B(NI_CtrOut(0))]	= V(2),
+				[B(NI_AI_SampleClock)]	= V(12),
+				[B(NI_AI_SampleClockTimebase)]	= V(12),
+				[B(NI_AI_StartTrigger)]	= V(12),
+				[B(NI_AI_ReferenceTrigger)]	= V(12),
+				[B(NI_AI_ConvertClock)]	= V(12),
+				[B(NI_AI_PauseTrigger)]	= V(12),
+				[B(NI_AO_SampleClock)]	= V(12),
+				[B(NI_AO_SampleClockTimebase)]	= V(12),
+				[B(NI_AO_StartTrigger)]	= V(12),
+				[B(NI_AO_PauseTrigger)]	= V(12),
+				[B(NI_DI_SampleClock)]	= V(12),
+				[B(NI_DO_SampleClock)]	= V(12),
+				[B(NI_MasterTimebase)]	= V(12),
+			},
+			[B(TRIGGER_LINE(2))] = {
+				[B(NI_PFI(0))]	= V(20),
+				[B(NI_PFI(1))]	= V(20),
+				[B(NI_PFI(2))]	= V(20),
+				[B(NI_PFI(3))]	= V(20),
+				[B(NI_PFI(4))]	= V(20),
+				[B(NI_PFI(5))]	= V(20),
+				[B(NI_PFI(6))]	= V(20),
+				[B(NI_PFI(7))]	= V(20),
+				[B(NI_PFI(8))]	= V(20),
+				[B(NI_PFI(9))]	= V(20),
+				[B(NI_PFI(10))]	= V(20),
+				[B(NI_PFI(11))]	= V(20),
+				[B(NI_PFI(12))]	= V(20),
+				[B(NI_PFI(13))]	= V(20),
+				[B(NI_PFI(14))]	= V(20),
+				[B(NI_PFI(15))]	= V(20),
+				[B(NI_CtrSource(0))]	= V(13),
+				[B(NI_CtrSource(1))]	= V(13),
+				[B(NI_CtrGate(0))]	= V(13),
+				[B(NI_CtrGate(1))]	= V(13),
+				[B(NI_CtrAux(0))]	= V(13),
+				[B(NI_CtrAux(1))]	= V(13),
+				[B(NI_CtrA(0))]	= V(13),
+				[B(NI_CtrA(1))]	= V(13),
+				[B(NI_CtrB(0))]	= V(13),
+				[B(NI_CtrB(1))]	= V(13),
+				[B(NI_CtrZ(0))]	= V(13),
+				[B(NI_CtrZ(1))]	= V(13),
+				[B(NI_CtrOut(0))]	= V(3),
+				[B(NI_AI_SampleClock)]	= V(13),
+				[B(NI_AI_SampleClockTimebase)]	= V(13),
+				[B(NI_AI_StartTrigger)]	= V(13),
+				[B(NI_AI_ReferenceTrigger)]	= V(13),
+				[B(NI_AI_ConvertClock)]	= V(13),
+				[B(NI_AI_PauseTrigger)]	= V(13),
+				[B(NI_AO_SampleClock)]	= V(13),
+				[B(NI_AO_SampleClockTimebase)]	= V(13),
+				[B(NI_AO_StartTrigger)]	= V(13),
+				[B(NI_AO_PauseTrigger)]	= V(13),
+				[B(NI_DI_SampleClock)]	= V(13),
+				[B(NI_DO_SampleClock)]	= V(13),
+				[B(NI_MasterTimebase)]	= V(13),
+			},
+			[B(TRIGGER_LINE(3))] = {
+				[B(NI_PFI(0))]	= V(21),
+				[B(NI_PFI(1))]	= V(21),
+				[B(NI_PFI(2))]	= V(21),
+				[B(NI_PFI(3))]	= V(21),
+				[B(NI_PFI(4))]	= V(21),
+				[B(NI_PFI(5))]	= V(21),
+				[B(NI_PFI(6))]	= V(21),
+				[B(NI_PFI(7))]	= V(21),
+				[B(NI_PFI(8))]	= V(21),
+				[B(NI_PFI(9))]	= V(21),
+				[B(NI_PFI(10))]	= V(21),
+				[B(NI_PFI(11))]	= V(21),
+				[B(NI_PFI(12))]	= V(21),
+				[B(NI_PFI(13))]	= V(21),
+				[B(NI_PFI(14))]	= V(21),
+				[B(NI_PFI(15))]	= V(21),
+				[B(NI_CtrSource(0))]	= V(14),
+				[B(NI_CtrSource(1))]	= V(14),
+				[B(NI_CtrGate(0))]	= V(14),
+				[B(NI_CtrGate(1))]	= V(14),
+				[B(NI_CtrAux(0))]	= V(14),
+				[B(NI_CtrAux(1))]	= V(14),
+				[B(NI_CtrA(0))]	= V(14),
+				[B(NI_CtrA(1))]	= V(14),
+				[B(NI_CtrB(0))]	= V(14),
+				[B(NI_CtrB(1))]	= V(14),
+				[B(NI_CtrZ(0))]	= V(14),
+				[B(NI_CtrZ(1))]	= V(14),
+				[B(NI_CtrOut(0))]	= V(4),
+				[B(NI_AI_SampleClock)]	= V(14),
+				[B(NI_AI_SampleClockTimebase)]	= V(14),
+				[B(NI_AI_StartTrigger)]	= V(14),
+				[B(NI_AI_ReferenceTrigger)]	= V(14),
+				[B(NI_AI_ConvertClock)]	= V(14),
+				[B(NI_AI_PauseTrigger)]	= V(14),
+				[B(NI_AO_SampleClock)]	= V(14),
+				[B(NI_AO_SampleClockTimebase)]	= V(14),
+				[B(NI_AO_StartTrigger)]	= V(14),
+				[B(NI_AO_PauseTrigger)]	= V(14),
+				[B(NI_DI_SampleClock)]	= V(14),
+				[B(NI_DO_SampleClock)]	= V(14),
+				[B(NI_MasterTimebase)]	= V(14),
+			},
+			[B(TRIGGER_LINE(4))] = {
+				[B(NI_PFI(0))]	= V(22),
+				[B(NI_PFI(1))]	= V(22),
+				[B(NI_PFI(2))]	= V(22),
+				[B(NI_PFI(3))]	= V(22),
+				[B(NI_PFI(4))]	= V(22),
+				[B(NI_PFI(5))]	= V(22),
+				[B(NI_PFI(6))]	= V(22),
+				[B(NI_PFI(7))]	= V(22),
+				[B(NI_PFI(8))]	= V(22),
+				[B(NI_PFI(9))]	= V(22),
+				[B(NI_PFI(10))]	= V(22),
+				[B(NI_PFI(11))]	= V(22),
+				[B(NI_PFI(12))]	= V(22),
+				[B(NI_PFI(13))]	= V(22),
+				[B(NI_PFI(14))]	= V(22),
+				[B(NI_PFI(15))]	= V(22),
+				[B(NI_CtrSource(0))]	= V(15),
+				[B(NI_CtrSource(1))]	= V(15),
+				[B(NI_CtrGate(0))]	= V(15),
+				[B(NI_CtrGate(1))]	= V(15),
+				[B(NI_CtrAux(0))]	= V(15),
+				[B(NI_CtrAux(1))]	= V(15),
+				[B(NI_CtrA(0))]	= V(15),
+				[B(NI_CtrA(1))]	= V(15),
+				[B(NI_CtrB(0))]	= V(15),
+				[B(NI_CtrB(1))]	= V(15),
+				[B(NI_CtrZ(0))]	= V(15),
+				[B(NI_CtrZ(1))]	= V(15),
+				[B(NI_CtrOut(0))]	= V(5),
+				[B(NI_AI_SampleClock)]	= V(15),
+				[B(NI_AI_SampleClockTimebase)]	= V(15),
+				[B(NI_AI_StartTrigger)]	= V(15),
+				[B(NI_AI_ReferenceTrigger)]	= V(15),
+				[B(NI_AI_ConvertClock)]	= V(15),
+				[B(NI_AI_PauseTrigger)]	= V(15),
+				[B(NI_AO_SampleClock)]	= V(15),
+				[B(NI_AO_SampleClockTimebase)]	= V(15),
+				[B(NI_AO_StartTrigger)]	= V(15),
+				[B(NI_AO_PauseTrigger)]	= V(15),
+				[B(NI_DI_SampleClock)]	= V(15),
+				[B(NI_DO_SampleClock)]	= V(15),
+				[B(NI_MasterTimebase)]	= V(15),
+			},
+			[B(TRIGGER_LINE(5))] = {
+				[B(NI_PFI(0))]	= V(23),
+				[B(NI_PFI(1))]	= V(23),
+				[B(NI_PFI(2))]	= V(23),
+				[B(NI_PFI(3))]	= V(23),
+				[B(NI_PFI(4))]	= V(23),
+				[B(NI_PFI(5))]	= V(23),
+				[B(NI_PFI(6))]	= V(23),
+				[B(NI_PFI(7))]	= V(23),
+				[B(NI_PFI(8))]	= V(23),
+				[B(NI_PFI(9))]	= V(23),
+				[B(NI_PFI(10))]	= V(23),
+				[B(NI_PFI(11))]	= V(23),
+				[B(NI_PFI(12))]	= V(23),
+				[B(NI_PFI(13))]	= V(23),
+				[B(NI_PFI(14))]	= V(23),
+				[B(NI_PFI(15))]	= V(23),
+				[B(NI_CtrSource(0))]	= V(16),
+				[B(NI_CtrSource(1))]	= V(16),
+				[B(NI_CtrGate(0))]	= V(16),
+				[B(NI_CtrGate(1))]	= V(16),
+				[B(NI_CtrAux(0))]	= V(16),
+				[B(NI_CtrAux(1))]	= V(16),
+				[B(NI_CtrA(0))]	= V(16),
+				[B(NI_CtrA(1))]	= V(16),
+				[B(NI_CtrB(0))]	= V(16),
+				[B(NI_CtrB(1))]	= V(16),
+				[B(NI_CtrZ(0))]	= V(16),
+				[B(NI_CtrZ(1))]	= V(16),
+				[B(NI_CtrOut(0))]	= V(6),
+				[B(NI_AI_SampleClock)]	= V(16),
+				[B(NI_AI_SampleClockTimebase)]	= V(16),
+				[B(NI_AI_StartTrigger)]	= V(16),
+				[B(NI_AI_ReferenceTrigger)]	= V(16),
+				[B(NI_AI_ConvertClock)]	= V(16),
+				[B(NI_AI_PauseTrigger)]	= V(16),
+				[B(NI_AO_SampleClock)]	= V(16),
+				[B(NI_AO_SampleClockTimebase)]	= V(16),
+				[B(NI_AO_StartTrigger)]	= V(16),
+				[B(NI_AO_PauseTrigger)]	= V(16),
+				[B(NI_DI_SampleClock)]	= V(16),
+				[B(NI_DO_SampleClock)]	= V(16),
+				[B(NI_MasterTimebase)]	= V(16),
+			},
+			[B(TRIGGER_LINE(6))] = {
+				[B(NI_PFI(0))]	= V(24),
+				[B(NI_PFI(1))]	= V(24),
+				[B(NI_PFI(2))]	= V(24),
+				[B(NI_PFI(3))]	= V(24),
+				[B(NI_PFI(4))]	= V(24),
+				[B(NI_PFI(5))]	= V(24),
+				[B(NI_PFI(6))]	= V(24),
+				[B(NI_PFI(7))]	= V(24),
+				[B(NI_PFI(8))]	= V(24),
+				[B(NI_PFI(9))]	= V(24),
+				[B(NI_PFI(10))]	= V(24),
+				[B(NI_PFI(11))]	= V(24),
+				[B(NI_PFI(12))]	= V(24),
+				[B(NI_PFI(13))]	= V(24),
+				[B(NI_PFI(14))]	= V(24),
+				[B(NI_PFI(15))]	= V(24),
+				[B(NI_CtrSource(0))]	= V(17),
+				[B(NI_CtrSource(1))]	= V(17),
+				[B(NI_CtrGate(0))]	= V(17),
+				[B(NI_CtrGate(1))]	= V(17),
+				[B(NI_CtrAux(0))]	= V(17),
+				[B(NI_CtrAux(1))]	= V(17),
+				[B(NI_CtrA(0))]	= V(17),
+				[B(NI_CtrA(1))]	= V(17),
+				[B(NI_CtrB(0))]	= V(17),
+				[B(NI_CtrB(1))]	= V(17),
+				[B(NI_CtrZ(0))]	= V(17),
+				[B(NI_CtrZ(1))]	= V(17),
+				[B(NI_CtrOut(0))]	= V(7),
+				[B(NI_AI_SampleClock)]	= V(17),
+				[B(NI_AI_SampleClockTimebase)]	= V(17),
+				[B(NI_AI_StartTrigger)]	= V(17),
+				[B(NI_AI_ReferenceTrigger)]	= V(17),
+				[B(NI_AI_ConvertClock)]	= V(17),
+				[B(NI_AI_PauseTrigger)]	= V(17),
+				[B(NI_AO_SampleClock)]	= V(17),
+				[B(NI_AO_SampleClockTimebase)]	= V(17),
+				[B(NI_AO_StartTrigger)]	= V(17),
+				[B(NI_AO_PauseTrigger)]	= V(17),
+				[B(NI_DI_SampleClock)]	= V(17),
+				[B(NI_DO_SampleClock)]	= V(17),
+				[B(NI_MasterTimebase)]	= V(17),
+			},
+			[B(TRIGGER_LINE(7))] = {
+				[B(NI_PFI(0))]	= V(25),
+				[B(NI_PFI(1))]	= V(25),
+				[B(NI_PFI(2))]	= V(25),
+				[B(NI_PFI(3))]	= V(25),
+				[B(NI_PFI(4))]	= V(25),
+				[B(NI_PFI(5))]	= V(25),
+				[B(NI_PFI(6))]	= V(25),
+				[B(NI_PFI(7))]	= V(25),
+				[B(NI_PFI(8))]	= V(25),
+				[B(NI_PFI(9))]	= V(25),
+				[B(NI_PFI(10))]	= V(25),
+				[B(NI_PFI(11))]	= V(25),
+				[B(NI_PFI(12))]	= V(25),
+				[B(NI_PFI(13))]	= V(25),
+				[B(NI_PFI(14))]	= V(25),
+				[B(NI_PFI(15))]	= V(25),
+				[B(NI_CtrSource(0))]	= V(27),
+				[B(NI_CtrSource(1))]	= V(27),
+				[B(NI_CtrGate(0))]	= V(27),
+				[B(NI_CtrGate(1))]	= V(27),
+				[B(NI_CtrAux(0))]	= V(27),
+				[B(NI_CtrAux(1))]	= V(27),
+				[B(NI_CtrA(0))]	= V(27),
+				[B(NI_CtrA(1))]	= V(27),
+				[B(NI_CtrB(0))]	= V(27),
+				[B(NI_CtrB(1))]	= V(27),
+				[B(NI_CtrZ(0))]	= V(27),
+				[B(NI_CtrZ(1))]	= V(27),
+				[B(NI_AI_SampleClock)]	= V(27),
+				[B(NI_AI_SampleClockTimebase)]	= V(27),
+				[B(NI_AI_StartTrigger)]	= V(27),
+				[B(NI_AI_ReferenceTrigger)]	= V(27),
+				[B(NI_AI_ConvertClock)]	= V(27),
+				[B(NI_AI_PauseTrigger)]	= V(27),
+				[B(NI_AO_SampleClock)]	= V(27),
+				[B(NI_AO_SampleClockTimebase)]	= V(27),
+				[B(NI_AO_StartTrigger)]	= V(27),
+				[B(NI_AO_PauseTrigger)]	= V(27),
+				[B(NI_DI_SampleClock)]	= V(27),
+				[B(NI_DO_SampleClock)]	= V(27),
+				[B(NI_MasterTimebase)]	= V(27),
+			},
+			[B(NI_RTSI_BRD(0))] = {
+				[B(TRIGGER_LINE(0))]	= V(8),
+				[B(TRIGGER_LINE(1))]	= V(8),
+				[B(TRIGGER_LINE(2))]	= V(8),
+				[B(TRIGGER_LINE(3))]	= V(8),
+				[B(TRIGGER_LINE(4))]	= V(8),
+				[B(TRIGGER_LINE(5))]	= V(8),
+				[B(TRIGGER_LINE(6))]	= V(8),
+				[B(TRIGGER_LINE(7))]	= V(8),
+			},
+			[B(NI_RTSI_BRD(1))] = {
+				[B(TRIGGER_LINE(0))]	= V(9),
+				[B(TRIGGER_LINE(1))]	= V(9),
+				[B(TRIGGER_LINE(2))]	= V(9),
+				[B(TRIGGER_LINE(3))]	= V(9),
+				[B(TRIGGER_LINE(4))]	= V(9),
+				[B(TRIGGER_LINE(5))]	= V(9),
+				[B(TRIGGER_LINE(6))]	= V(9),
+				[B(TRIGGER_LINE(7))]	= V(9),
+			},
+			[B(NI_RTSI_BRD(2))] = {
+				[B(TRIGGER_LINE(0))]	= V(10),
+				[B(TRIGGER_LINE(1))]	= V(10),
+				[B(TRIGGER_LINE(2))]	= V(10),
+				[B(TRIGGER_LINE(3))]	= V(10),
+				[B(TRIGGER_LINE(4))]	= V(10),
+				[B(TRIGGER_LINE(5))]	= V(10),
+				[B(TRIGGER_LINE(6))]	= V(10),
+				[B(TRIGGER_LINE(7))]	= V(10),
+			},
+			[B(NI_RTSI_BRD(3))] = {
+				[B(TRIGGER_LINE(0))]	= V(11),
+				[B(TRIGGER_LINE(1))]	= V(11),
+				[B(TRIGGER_LINE(2))]	= V(11),
+				[B(TRIGGER_LINE(3))]	= V(11),
+				[B(TRIGGER_LINE(4))]	= V(11),
+				[B(TRIGGER_LINE(5))]	= V(11),
+				[B(TRIGGER_LINE(6))]	= V(11),
+				[B(TRIGGER_LINE(7))]	= V(11),
+			},
+			[B(NI_CtrSource(0))] = {
+				[B(NI_PFI(0))]	= V(9),
+				[B(NI_PFI(1))]	= V(9),
+				[B(NI_PFI(2))]	= V(9),
+				[B(NI_PFI(3))]	= V(9),
+				[B(NI_PFI(4))]	= V(9),
+				[B(NI_PFI(5))]	= V(9),
+				[B(NI_PFI(6))]	= V(9),
+				[B(NI_PFI(7))]	= V(9),
+				[B(NI_PFI(8))]	= V(9),
+				[B(NI_PFI(9))]	= V(9),
+				[B(NI_PFI(10))]	= V(9),
+				[B(NI_PFI(11))]	= V(9),
+				[B(NI_PFI(12))]	= V(9),
+				[B(NI_PFI(13))]	= V(9),
+				[B(NI_PFI(14))]	= V(9),
+				[B(NI_PFI(15))]	= V(9),
+				[B(TRIGGER_LINE(0))]	= V(5),
+				[B(TRIGGER_LINE(1))]	= V(5),
+				[B(TRIGGER_LINE(2))]	= V(5),
+				[B(TRIGGER_LINE(3))]	= V(5),
+				[B(TRIGGER_LINE(4))]	= V(5),
+				[B(TRIGGER_LINE(5))]	= V(5),
+				[B(TRIGGER_LINE(6))]	= V(5),
+				[B(TRIGGER_LINE(7))]	= V(5),
+				[B(NI_CtrGate(1))]	= V(29),
+				[B(NI_CtrAux(1))]	= V(29),
+			},
+			[B(NI_CtrSource(1))] = {
+				[B(NI_PFI(0))]	= V(4),
+				[B(NI_PFI(1))]	= V(4),
+				[B(NI_PFI(2))]	= V(4),
+				[B(NI_PFI(3))]	= V(4),
+				[B(NI_PFI(4))]	= V(4),
+				[B(NI_PFI(5))]	= V(4),
+				[B(NI_PFI(6))]	= V(4),
+				[B(NI_PFI(7))]	= V(4),
+				[B(NI_PFI(8))]	= V(4),
+				[B(NI_PFI(9))]	= V(4),
+				[B(NI_PFI(10))]	= V(4),
+				[B(NI_PFI(11))]	= V(4),
+				[B(NI_PFI(12))]	= V(4),
+				[B(NI_PFI(13))]	= V(4),
+				[B(NI_PFI(14))]	= V(4),
+				[B(NI_PFI(15))]	= V(4),
+				[B(NI_RTSI_BRD(0))]	= V(11),
+				[B(NI_RTSI_BRD(1))]	= V(11),
+				[B(NI_RTSI_BRD(2))]	= V(11),
+				[B(NI_RTSI_BRD(3))]	= V(11),
+				[B(NI_CtrGate(0))]	= V(29),
+				[B(NI_CtrAux(0))]	= V(29),
+			},
+			[B(NI_CtrGate(0))] = {
+				[B(NI_PFI(0))]	= V(10),
+				[B(NI_PFI(1))]	= V(10),
+				[B(NI_PFI(2))]	= V(10),
+				[B(NI_PFI(3))]	= V(10),
+				[B(NI_PFI(4))]	= V(10),
+				[B(NI_PFI(5))]	= V(10),
+				[B(NI_PFI(6))]	= V(10),
+				[B(NI_PFI(7))]	= V(10),
+				[B(NI_PFI(8))]	= V(10),
+				[B(NI_PFI(9))]	= V(10),
+				[B(NI_PFI(10))]	= V(10),
+				[B(NI_PFI(11))]	= V(10),
+				[B(NI_PFI(12))]	= V(10),
+				[B(NI_PFI(13))]	= V(10),
+				[B(NI_PFI(14))]	= V(10),
+				[B(NI_PFI(15))]	= V(10),
+				[B(TRIGGER_LINE(0))]	= V(6),
+				[B(TRIGGER_LINE(1))]	= V(6),
+				[B(TRIGGER_LINE(2))]	= V(6),
+				[B(TRIGGER_LINE(3))]	= V(6),
+				[B(TRIGGER_LINE(4))]	= V(6),
+				[B(TRIGGER_LINE(5))]	= V(6),
+				[B(TRIGGER_LINE(6))]	= V(6),
+				[B(TRIGGER_LINE(7))]	= V(6),
+				[B(NI_CtrSource(1))]	= V(Gi_SRC(20, 0)),
+			},
+			[B(NI_CtrGate(1))] = {
+				[B(NI_PFI(0))]	= V(5),
+				[B(NI_PFI(1))]	= V(5),
+				[B(NI_PFI(2))]	= V(5),
+				[B(NI_PFI(3))]	= V(5),
+				[B(NI_PFI(4))]	= V(5),
+				[B(NI_PFI(5))]	= V(5),
+				[B(NI_PFI(6))]	= V(5),
+				[B(NI_PFI(7))]	= V(5),
+				[B(NI_PFI(8))]	= V(5),
+				[B(NI_PFI(9))]	= V(5),
+				[B(NI_PFI(10))]	= V(5),
+				[B(NI_PFI(11))]	= V(5),
+				[B(NI_PFI(12))]	= V(5),
+				[B(NI_PFI(13))]	= V(5),
+				[B(NI_PFI(14))]	= V(5),
+				[B(NI_PFI(15))]	= V(5),
+				[B(NI_RTSI_BRD(0))]	= V(10),
+				[B(NI_RTSI_BRD(1))]	= V(10),
+				[B(NI_RTSI_BRD(2))]	= V(10),
+				[B(NI_RTSI_BRD(3))]	= V(10),
+				[B(NI_CtrSource(0))]	= V(Gi_SRC(20, 0)),
+			},
+			[B(NI_CtrZ(0))] = {
+				[B(NI_RTSI_BRD(0))]	= V(13),
+				[B(NI_RTSI_BRD(1))]	= V(13),
+				[B(NI_RTSI_BRD(2))]	= V(13),
+				[B(NI_RTSI_BRD(3))]	= V(13),
+			},
+			[B(NI_CtrZ(1))] = {
+				[B(NI_RTSI_BRD(0))]	= V(12),
+				[B(NI_RTSI_BRD(1))]	= V(12),
+				[B(NI_RTSI_BRD(2))]	= V(12),
+				[B(NI_RTSI_BRD(3))]	= V(12),
+			},
+			[B(NI_CtrInternalOutput(0))] = {
+				[B(NI_PFI(0))]	= V(13),
+				[B(NI_PFI(1))]	= V(13),
+				[B(NI_PFI(2))]	= V(13),
+				[B(NI_PFI(3))]	= V(13),
+				[B(NI_PFI(4))]	= V(13),
+				[B(NI_PFI(5))]	= V(13),
+				[B(NI_PFI(6))]	= V(13),
+				[B(NI_PFI(7))]	= V(13),
+				[B(NI_PFI(8))]	= V(13),
+				[B(NI_PFI(9))]	= V(13),
+				[B(NI_PFI(10))]	= V(13),
+				[B(NI_PFI(11))]	= V(13),
+				[B(NI_PFI(12))]	= V(13),
+				[B(NI_PFI(13))]	= V(13),
+				[B(NI_PFI(14))]	= V(13),
+				[B(NI_PFI(15))]	= V(13),
+				[B(NI_CtrSource(1))]	= V(19),
+				[B(NI_CtrGate(1))]	= V(20 /* source:  mhddk GP examples */),
+				[B(NI_CtrAux(1))]	= V(20 /* source:  mhddk GP examples */),
+				[B(NI_CtrOut(0))]	= V(0),
+				[B(NI_AI_SampleClock)]	= V(19),
+				[B(NI_AI_StartTrigger)]	= V(18),
+				[B(NI_AI_ConvertClock)]	= V(19 /* source:  mhddk example headers */),
+				[B(NI_AO_SampleClock)]	= V(18),
+				[B(NI_DI_SampleClock)]	= V(28),
+				[B(NI_DO_SampleClock)]	= V(28),
+				[B(NI_RGOUT0)]	= V(0),
+			},
+			[B(NI_CtrInternalOutput(1))] = {
+				[B(NI_PFI(0))]	= V(14),
+				[B(NI_PFI(1))]	= V(14),
+				[B(NI_PFI(2))]	= V(14),
+				[B(NI_PFI(3))]	= V(14),
+				[B(NI_PFI(4))]	= V(14),
+				[B(NI_PFI(5))]	= V(14),
+				[B(NI_PFI(6))]	= V(14),
+				[B(NI_PFI(7))]	= V(14),
+				[B(NI_PFI(8))]	= V(14),
+				[B(NI_PFI(9))]	= V(14),
+				[B(NI_PFI(10))]	= V(14),
+				[B(NI_PFI(11))]	= V(14),
+				[B(NI_PFI(12))]	= V(14),
+				[B(NI_PFI(13))]	= V(14),
+				[B(NI_PFI(14))]	= V(14),
+				[B(NI_PFI(15))]	= V(14),
+				[B(NI_CtrSource(0))]	= V(19),
+				[B(NI_CtrGate(0))]	= V(20 /* source:  mhddk GP examples */),
+				[B(NI_CtrAux(0))]	= V(20 /* source:  mhddk GP examples */),
+				[B(NI_CtrOut(1))]	= V(0),
+				[B(NI_AI_SampleClock)]	= V(28),
+				[B(NI_AI_StartTrigger)]	= V(19),
+				[B(NI_AI_ConvertClock)]	= V(18 /* source:  mhddk example headers */),
+				[B(NI_AO_SampleClock)]	= V(19),
+				[B(NI_DI_SampleClock)]	= V(29),
+				[B(NI_DO_SampleClock)]	= V(29),
+			},
+			[B(NI_CtrOut(0))] = {
+				[B(NI_RGOUT0)]	= V(1),
+			},
+			[B(NI_CtrOut(1))] = {
+				[B(NI_RTSI_BRD(0))]	= V(9),
+				[B(NI_RTSI_BRD(1))]	= V(9),
+				[B(NI_RTSI_BRD(2))]	= V(9),
+				[B(NI_RTSI_BRD(3))]	= V(9),
+			},
+			[B(PXI_Star)] = {
+				[B(NI_PFI(0))]	= V(26),
+				[B(NI_PFI(1))]	= V(26),
+				[B(NI_PFI(2))]	= V(26),
+				[B(NI_PFI(3))]	= V(26),
+				[B(NI_PFI(4))]	= V(26),
+				[B(NI_PFI(5))]	= V(26),
+				[B(NI_PFI(6))]	= V(26),
+				[B(NI_PFI(7))]	= V(26),
+				[B(NI_PFI(8))]	= V(26),
+				[B(NI_PFI(9))]	= V(26),
+				[B(NI_PFI(10))]	= V(26),
+				[B(NI_PFI(11))]	= V(26),
+				[B(NI_PFI(12))]	= V(26),
+				[B(NI_PFI(13))]	= V(26),
+				[B(NI_PFI(14))]	= V(26),
+				[B(NI_PFI(15))]	= V(26),
+				[B(NI_CtrSource(0))]	= V(Gi_SRC(20, 1)),
+				[B(NI_CtrSource(1))]	= V(Gi_SRC(20, 1)),
+				[B(NI_CtrGate(0))]	= V(19),
+				[B(NI_CtrGate(1))]	= V(19),
+				[B(NI_CtrAux(0))]	= V(19),
+				[B(NI_CtrAux(1))]	= V(19),
+				[B(NI_CtrA(0))]	= V(20),
+				[B(NI_CtrA(1))]	= V(20),
+				[B(NI_CtrB(0))]	= V(20),
+				[B(NI_CtrB(1))]	= V(20),
+				[B(NI_CtrZ(0))]	= V(20),
+				[B(NI_CtrZ(1))]	= V(20),
+				[B(NI_AI_SampleClock)]	= V(20),
+				[B(NI_AI_SampleClockTimebase)]	= V(20),
+				[B(NI_AI_StartTrigger)]	= V(20),
+				[B(NI_AI_ReferenceTrigger)]	= V(20),
+				[B(NI_AI_ConvertClock)]	= V(20),
+				[B(NI_AI_PauseTrigger)]	= V(20),
+				[B(NI_AO_SampleClock)]	= V(20),
+				[B(NI_AO_SampleClockTimebase)]	= V(20),
+				[B(NI_AO_StartTrigger)]	= V(20),
+				[B(NI_AO_PauseTrigger)]	= V(20),
+				[B(NI_DI_SampleClock)]	= V(20),
+				[B(NI_DO_SampleClock)]	= V(20),
+				[B(NI_MasterTimebase)]	= V(20),
+			},
+			[B(PXI_Clk10)] = {
+				[B(NI_CtrSource(0))]	= V(29),
+				[B(NI_CtrSource(1))]	= V(29),
+				[B(NI_AI_SampleClockTimebase)]	= V(29),
+				[B(NI_AO_SampleClockTimebase)]	= V(29),
+				[B(NI_MasterTimebase)]	= V(29),
+			},
+			[B(NI_AI_SampleClock)] = {
+				[B(NI_PFI(0))]	= V(8),
+				[B(NI_PFI(1))]	= V(8),
+				[B(NI_PFI(2))]	= V(8),
+				[B(NI_PFI(3))]	= V(8),
+				[B(NI_PFI(4))]	= V(8),
+				[B(NI_PFI(5))]	= V(8),
+				[B(NI_PFI(6))]	= V(8),
+				[B(NI_PFI(7))]	= V(8),
+				[B(NI_PFI(8))]	= V(8),
+				[B(NI_PFI(9))]	= V(8),
+				[B(NI_PFI(10))]	= V(8),
+				[B(NI_PFI(11))]	= V(8),
+				[B(NI_PFI(12))]	= V(8),
+				[B(NI_PFI(13))]	= V(8),
+				[B(NI_PFI(14))]	= V(8),
+				[B(NI_PFI(15))]	= V(8),
+				[B(NI_RTSI_BRD(0))]	= V(15),
+				[B(NI_RTSI_BRD(1))]	= V(15),
+				[B(NI_RTSI_BRD(2))]	= V(15),
+				[B(NI_RTSI_BRD(3))]	= V(15),
+				[B(NI_DI_SampleClock)]	= V(18),
+				[B(NI_DO_SampleClock)]	= V(18),
+			},
+			[B(NI_AI_SampleClockTimebase)] = {
+				[B(NI_AI_SampleClock)]	= V(0),
+				[B(NI_AI_ConvertClockTimebase)]	= V(0),
+			},
+			[B(NI_AI_StartTrigger)] = {
+				[B(NI_PFI(0))]	= V(1),
+				[B(NI_PFI(1))]	= V(1),
+				[B(NI_PFI(2))]	= V(1),
+				[B(NI_PFI(3))]	= V(1),
+				[B(NI_PFI(4))]	= V(1),
+				[B(NI_PFI(5))]	= V(1),
+				[B(NI_PFI(6))]	= V(1),
+				[B(NI_PFI(7))]	= V(1),
+				[B(NI_PFI(8))]	= V(1),
+				[B(NI_PFI(9))]	= V(1),
+				[B(NI_PFI(10))]	= V(1),
+				[B(NI_PFI(11))]	= V(1),
+				[B(NI_PFI(12))]	= V(1),
+				[B(NI_PFI(13))]	= V(1),
+				[B(NI_PFI(14))]	= V(1),
+				[B(NI_PFI(15))]	= V(1),
+				[B(TRIGGER_LINE(0))]	= V(0),
+				[B(TRIGGER_LINE(1))]	= V(0),
+				[B(TRIGGER_LINE(2))]	= V(0),
+				[B(TRIGGER_LINE(3))]	= V(0),
+				[B(TRIGGER_LINE(4))]	= V(0),
+				[B(TRIGGER_LINE(5))]	= V(0),
+				[B(TRIGGER_LINE(6))]	= V(0),
+				[B(TRIGGER_LINE(7))]	= V(0),
+				[B(NI_CtrGate(0))]	= V(28),
+				[B(NI_CtrGate(1))]	= V(28),
+				[B(NI_CtrAux(0))]	= V(28),
+				[B(NI_CtrAux(1))]	= V(28),
+				[B(NI_AO_StartTrigger)]	= V(19),
+			},
+			[B(NI_AI_ReferenceTrigger)] = {
+				[B(NI_PFI(0))]	= V(2),
+				[B(NI_PFI(1))]	= V(2),
+				[B(NI_PFI(2))]	= V(2),
+				[B(NI_PFI(3))]	= V(2),
+				[B(NI_PFI(4))]	= V(2),
+				[B(NI_PFI(5))]	= V(2),
+				[B(NI_PFI(6))]	= V(2),
+				[B(NI_PFI(7))]	= V(2),
+				[B(NI_PFI(8))]	= V(2),
+				[B(NI_PFI(9))]	= V(2),
+				[B(NI_PFI(10))]	= V(2),
+				[B(NI_PFI(11))]	= V(2),
+				[B(NI_PFI(12))]	= V(2),
+				[B(NI_PFI(13))]	= V(2),
+				[B(NI_PFI(14))]	= V(2),
+				[B(NI_PFI(15))]	= V(2),
+				[B(TRIGGER_LINE(0))]	= V(1),
+				[B(TRIGGER_LINE(1))]	= V(1),
+				[B(TRIGGER_LINE(2))]	= V(1),
+				[B(TRIGGER_LINE(3))]	= V(1),
+				[B(TRIGGER_LINE(4))]	= V(1),
+				[B(TRIGGER_LINE(5))]	= V(1),
+				[B(TRIGGER_LINE(6))]	= V(1),
+				[B(TRIGGER_LINE(7))]	= V(1),
+				[B(NI_CtrGate(0))]	= V(18),
+				[B(NI_CtrGate(1))]	= V(18),
+				[B(NI_CtrAux(0))]	= V(18),
+				[B(NI_CtrAux(1))]	= V(18),
+				[B(NI_AO_StartTrigger)]	= V(18),
+			},
+			[B(NI_AI_ConvertClock)] = {
+				[B(NI_PFI(0))]	= V(3),
+				[B(NI_PFI(1))]	= V(3),
+				[B(NI_PFI(2))]	= V(3),
+				[B(NI_PFI(3))]	= V(3),
+				[B(NI_PFI(4))]	= V(3),
+				[B(NI_PFI(5))]	= V(3),
+				[B(NI_PFI(6))]	= V(3),
+				[B(NI_PFI(7))]	= V(3),
+				[B(NI_PFI(8))]	= V(3),
+				[B(NI_PFI(9))]	= V(3),
+				[B(NI_PFI(10))]	= V(3),
+				[B(NI_PFI(11))]	= V(3),
+				[B(NI_PFI(12))]	= V(3),
+				[B(NI_PFI(13))]	= V(3),
+				[B(NI_PFI(14))]	= V(3),
+				[B(NI_PFI(15))]	= V(3),
+				[B(TRIGGER_LINE(0))]	= V(2),
+				[B(TRIGGER_LINE(1))]	= V(2),
+				[B(TRIGGER_LINE(2))]	= V(2),
+				[B(TRIGGER_LINE(3))]	= V(2),
+				[B(TRIGGER_LINE(4))]	= V(2),
+				[B(TRIGGER_LINE(5))]	= V(2),
+				[B(TRIGGER_LINE(6))]	= V(2),
+				[B(TRIGGER_LINE(7))]	= V(2),
+				[B(NI_DI_SampleClock)]	= V(19),
+				[B(NI_DO_SampleClock)]	= V(19),
+			},
+			[B(NI_AI_ConvertClockTimebase)] = {
+				[B(NI_AI_ConvertClock)]	= V(0),
+			},
+			[B(NI_AI_PauseTrigger)] = {
+				[B(NI_RTSI_BRD(0))]	= V(7),
+				[B(NI_RTSI_BRD(1))]	= V(7),
+				[B(NI_RTSI_BRD(2))]	= V(7),
+				[B(NI_RTSI_BRD(3))]	= V(7),
+			},
+			[B(NI_AO_SampleClock)] = {
+				[B(NI_PFI(0))]	= V(6),
+				[B(NI_PFI(1))]	= V(6),
+				[B(NI_PFI(2))]	= V(6),
+				[B(NI_PFI(3))]	= V(6),
+				[B(NI_PFI(4))]	= V(6),
+				[B(NI_PFI(5))]	= V(6),
+				[B(NI_PFI(6))]	= V(6),
+				[B(NI_PFI(7))]	= V(6),
+				[B(NI_PFI(8))]	= V(6),
+				[B(NI_PFI(9))]	= V(6),
+				[B(NI_PFI(10))]	= V(6),
+				[B(NI_PFI(11))]	= V(6),
+				[B(NI_PFI(12))]	= V(6),
+				[B(NI_PFI(13))]	= V(6),
+				[B(NI_PFI(14))]	= V(6),
+				[B(NI_PFI(15))]	= V(6),
+				[B(TRIGGER_LINE(0))]	= V(3),
+				[B(TRIGGER_LINE(1))]	= V(3),
+				[B(TRIGGER_LINE(2))]	= V(3),
+				[B(TRIGGER_LINE(3))]	= V(3),
+				[B(TRIGGER_LINE(4))]	= V(3),
+				[B(TRIGGER_LINE(5))]	= V(3),
+				[B(TRIGGER_LINE(6))]	= V(3),
+				[B(TRIGGER_LINE(7))]	= V(3),
+				[B(NI_DI_SampleClock)]	= V(31),
+				[B(NI_DO_SampleClock)]	= V(31),
+			},
+			[B(NI_AO_SampleClockTimebase)] = {
+				[B(NI_AO_SampleClock)]	= V(0),
+			},
+			[B(NI_AO_StartTrigger)] = {
+				[B(NI_PFI(0))]	= V(7),
+				[B(NI_PFI(1))]	= V(7),
+				[B(NI_PFI(2))]	= V(7),
+				[B(NI_PFI(3))]	= V(7),
+				[B(NI_PFI(4))]	= V(7),
+				[B(NI_PFI(5))]	= V(7),
+				[B(NI_PFI(6))]	= V(7),
+				[B(NI_PFI(7))]	= V(7),
+				[B(NI_PFI(8))]	= V(7),
+				[B(NI_PFI(9))]	= V(7),
+				[B(NI_PFI(10))]	= V(7),
+				[B(NI_PFI(11))]	= V(7),
+				[B(NI_PFI(12))]	= V(7),
+				[B(NI_PFI(13))]	= V(7),
+				[B(NI_PFI(14))]	= V(7),
+				[B(NI_PFI(15))]	= V(7),
+				[B(TRIGGER_LINE(0))]	= V(4),
+				[B(TRIGGER_LINE(1))]	= V(4),
+				[B(TRIGGER_LINE(2))]	= V(4),
+				[B(TRIGGER_LINE(3))]	= V(4),
+				[B(TRIGGER_LINE(4))]	= V(4),
+				[B(TRIGGER_LINE(5))]	= V(4),
+				[B(TRIGGER_LINE(6))]	= V(4),
+				[B(TRIGGER_LINE(7))]	= V(4),
+			},
+			[B(NI_AO_PauseTrigger)] = {
+				[B(NI_RTSI_BRD(0))]	= V(6),
+				[B(NI_RTSI_BRD(1))]	= V(6),
+				[B(NI_RTSI_BRD(2))]	= V(6),
+				[B(NI_RTSI_BRD(3))]	= V(6),
+			},
+			[B(NI_DI_SampleClock)] = {
+				[B(NI_PFI(0))]	= V(29),
+				[B(NI_PFI(1))]	= V(29),
+				[B(NI_PFI(2))]	= V(29),
+				[B(NI_PFI(3))]	= V(29),
+				[B(NI_PFI(4))]	= V(29),
+				[B(NI_PFI(5))]	= V(29),
+				[B(NI_PFI(6))]	= V(29),
+				[B(NI_PFI(7))]	= V(29),
+				[B(NI_PFI(8))]	= V(29),
+				[B(NI_PFI(9))]	= V(29),
+				[B(NI_PFI(10))]	= V(29),
+				[B(NI_PFI(11))]	= V(29),
+				[B(NI_PFI(12))]	= V(29),
+				[B(NI_PFI(13))]	= V(29),
+				[B(NI_PFI(14))]	= V(29),
+				[B(NI_PFI(15))]	= V(29),
+			},
+			[B(NI_DO_SampleClock)] = {
+				[B(NI_PFI(0))]	= V(30),
+				[B(NI_PFI(1))]	= V(30),
+				[B(NI_PFI(2))]	= V(30),
+				[B(NI_PFI(3))]	= V(30),
+				[B(NI_PFI(4))]	= V(30),
+				[B(NI_PFI(5))]	= V(30),
+				[B(NI_PFI(6))]	= V(30),
+				[B(NI_PFI(7))]	= V(30),
+				[B(NI_PFI(8))]	= V(30),
+				[B(NI_PFI(9))]	= V(30),
+				[B(NI_PFI(10))]	= V(30),
+				[B(NI_PFI(11))]	= V(30),
+				[B(NI_PFI(12))]	= V(30),
+				[B(NI_PFI(13))]	= V(30),
+				[B(NI_PFI(14))]	= V(30),
+				[B(NI_PFI(15))]	= V(30),
+			},
+			[B(NI_20MHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(0),
+				[B(NI_CtrSource(1))]	= V(0),
+				[B(NI_AI_SampleClockTimebase)]	= V(28),
+				[B(NI_AI_ConvertClockTimebase)]	= V(1),
+				[B(NI_AO_SampleClockTimebase)]	= V(28),
+			},
+			[B(NI_80MHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(Gi_SRC(30, 0)),
+				[B(NI_CtrSource(1))]	= V(Gi_SRC(30, 0)),
+			},
+			[B(NI_100kHzTimebase)] = {
+				[B(NI_CtrSource(0))]	= V(18),
+				[B(NI_CtrSource(1))]	= V(18),
+				[B(NI_AI_SampleClockTimebase)]	= V(19),
+				[B(NI_AO_SampleClockTimebase)]	= V(19),
+			},
+			[B(NI_10MHzRefClock)] = {
+				[B(TRIGGER_LINE(0))]	= V(12),
+				[B(TRIGGER_LINE(1))]	= V(12),
+				[B(TRIGGER_LINE(2))]	= V(12),
+				[B(TRIGGER_LINE(3))]	= V(12),
+				[B(TRIGGER_LINE(4))]	= V(12),
+				[B(TRIGGER_LINE(5))]	= V(12),
+				[B(TRIGGER_LINE(6))]	= V(12),
+				[B(TRIGGER_LINE(7))]	= V(12),
+				[B(NI_MasterTimebase)]	= V(0),
+			},
+			[B(NI_FrequencyOutput)] = {
+				[B(NI_PFI(0))]	= V(15),
+				[B(NI_PFI(1))]	= V(15),
+				[B(NI_PFI(2))]	= V(15),
+				[B(NI_PFI(3))]	= V(15),
+				[B(NI_PFI(4))]	= V(15),
+				[B(NI_PFI(5))]	= V(15),
+				[B(NI_PFI(6))]	= V(15),
+				[B(NI_PFI(7))]	= V(15),
+				[B(NI_PFI(8))]	= V(15),
+				[B(NI_PFI(9))]	= V(15),
+				[B(NI_PFI(10))]	= V(15),
+				[B(NI_PFI(11))]	= V(15),
+				[B(NI_PFI(12))]	= V(15),
+				[B(NI_PFI(13))]	= V(15),
+				[B(NI_PFI(14))]	= V(15),
+				[B(NI_PFI(15))]	= V(15),
+				[B(NI_RTSI_BRD(0))]	= V(8),
+				[B(NI_RTSI_BRD(1))]	= V(8),
+				[B(NI_RTSI_BRD(2))]	= V(8),
+				[B(NI_RTSI_BRD(3))]	= V(8),
+				[B(NI_DI_SampleClock)]	= V(32),
+				[B(NI_DO_SampleClock)]	= V(32),
+			},
+			[B(NI_ChangeDetectionEvent)] = {
+				[B(NI_PFI(0))]	= V(28),
+				[B(NI_PFI(1))]	= V(28),
+				[B(NI_PFI(2))]	= V(28),
+				[B(NI_PFI(3))]	= V(28),
+				[B(NI_PFI(4))]	= V(28),
+				[B(NI_PFI(5))]	= V(28),
+				[B(NI_PFI(6))]	= V(28),
+				[B(NI_PFI(7))]	= V(28),
+				[B(NI_PFI(8))]	= V(28),
+				[B(NI_PFI(9))]	= V(28),
+				[B(NI_PFI(10))]	= V(28),
+				[B(NI_PFI(11))]	= V(28),
+				[B(NI_PFI(12))]	= V(28),
+				[B(NI_PFI(13))]	= V(28),
+				[B(NI_PFI(14))]	= V(28),
+				[B(NI_PFI(15))]	= V(28),
+				[B(NI_DI_SampleClock)]	= V(33),
+				[B(NI_DO_SampleClock)]	= V(33),
+			},
+			[B(NI_AnalogComparisonEvent)] = {
+				[B(NI_PFI(0))]	= V(17),
+				[B(NI_PFI(1))]	= V(17),
+				[B(NI_PFI(2))]	= V(17),
+				[B(NI_PFI(3))]	= V(17),
+				[B(NI_PFI(4))]	= V(17),
+				[B(NI_PFI(5))]	= V(17),
+				[B(NI_PFI(6))]	= V(17),
+				[B(NI_PFI(7))]	= V(17),
+				[B(NI_PFI(8))]	= V(17),
+				[B(NI_PFI(9))]	= V(17),
+				[B(NI_PFI(10))]	= V(17),
+				[B(NI_PFI(11))]	= V(17),
+				[B(NI_PFI(12))]	= V(17),
+				[B(NI_PFI(13))]	= V(17),
+				[B(NI_PFI(14))]	= V(17),
+				[B(NI_PFI(15))]	= V(17),
+				[B(NI_RTSI_BRD(0))]	= V(14),
+				[B(NI_RTSI_BRD(1))]	= V(14),
+				[B(NI_RTSI_BRD(2))]	= V(14),
+				[B(NI_RTSI_BRD(3))]	= V(14),
+				[B(NI_CtrSource(0))]	= V(Gi_SRC(30, 1)),
+				[B(NI_CtrSource(1))]	= V(Gi_SRC(30, 1)),
+				[B(NI_CtrGate(0))]	= V(30),
+				[B(NI_CtrGate(1))]	= V(30),
+				[B(NI_CtrAux(0))]	= V(30),
+				[B(NI_CtrAux(1))]	= V(30),
+				[B(NI_CtrA(0))]	= V(30),
+				[B(NI_CtrA(1))]	= V(30),
+				[B(NI_CtrB(0))]	= V(30),
+				[B(NI_CtrB(1))]	= V(30),
+				[B(NI_CtrZ(0))]	= V(30),
+				[B(NI_CtrZ(1))]	= V(30),
+				[B(NI_AI_SampleClock)]	= V(30),
+				[B(NI_AI_SampleClockTimebase)]	= V(30),
+				[B(NI_AI_StartTrigger)]	= V(30),
+				[B(NI_AI_ReferenceTrigger)]	= V(30),
+				[B(NI_AI_ConvertClock)]	= V(30),
+				[B(NI_AI_PauseTrigger)]	= V(30),
+				[B(NI_AO_SampleClock)]	= V(30),
+				[B(NI_AO_SampleClockTimebase)]	= V(30),
+				[B(NI_AO_StartTrigger)]	= V(30),
+				[B(NI_AO_PauseTrigger)]	= V(30),
+			},
+			[B(NI_SCXI_Trig1)] = {
+				[B(NI_PFI(0))]	= V(27),
+				[B(NI_PFI(1))]	= V(27),
+				[B(NI_PFI(2))]	= V(27),
+				[B(NI_PFI(3))]	= V(27),
+				[B(NI_PFI(4))]	= V(27),
+				[B(NI_PFI(5))]	= V(27),
+				[B(NI_PFI(6))]	= V(27),
+				[B(NI_PFI(7))]	= V(27),
+				[B(NI_PFI(8))]	= V(27),
+				[B(NI_PFI(9))]	= V(27),
+				[B(NI_PFI(10))]	= V(27),
+				[B(NI_PFI(11))]	= V(27),
+				[B(NI_PFI(12))]	= V(27),
+				[B(NI_PFI(13))]	= V(27),
+				[B(NI_PFI(14))]	= V(27),
+				[B(NI_PFI(15))]	= V(27),
+				[B(NI_AI_SampleClock)]	= V(29),
+			},
+			[B(NI_LogicLow)] = {
+				[B(NI_CtrSource(0))]	= V(31),
+				[B(NI_CtrSource(1))]	= V(31),
+				[B(NI_CtrGate(0))]	= V(31),
+				[B(NI_CtrGate(1))]	= V(31),
+				[B(NI_CtrAux(0))]	= V(31),
+				[B(NI_CtrAux(1))]	= V(31),
+				[B(NI_CtrA(0))]	= V(31),
+				[B(NI_CtrA(1))]	= V(31),
+				[B(NI_CtrB(0))]	= V(31),
+				[B(NI_CtrB(1))]	= V(31),
+				[B(NI_CtrZ(0))]	= V(31),
+				[B(NI_CtrZ(1))]	= V(31),
+				[B(NI_AI_SampleClock)]	= V(31),
+				[B(NI_AI_SampleClockTimebase)]	= V(31),
+				[B(NI_AI_StartTrigger)]	= V(31),
+				[B(NI_AI_ReferenceTrigger)]	= V(31),
+				[B(NI_AI_ConvertClock)]	= V(31),
+				[B(NI_AI_PauseTrigger)]	= V(31),
+				[B(NI_AO_SampleClock)]	= V(31),
+				[B(NI_AO_SampleClockTimebase)]	= V(31),
+				[B(NI_AO_StartTrigger)]	= V(31),
+				[B(NI_AO_PauseTrigger)]	= V(31),
+			},
+			[B(NI_ExternalStrobe)] = {
+				[B(NI_PFI(0))]	= V(11),
+				[B(NI_PFI(1))]	= V(11),
+				[B(NI_PFI(2))]	= V(11),
+				[B(NI_PFI(3))]	= V(11),
+				[B(NI_PFI(4))]	= V(11),
+				[B(NI_PFI(5))]	= V(11),
+				[B(NI_PFI(6))]	= V(11),
+				[B(NI_PFI(7))]	= V(11),
+				[B(NI_PFI(8))]	= V(11),
+				[B(NI_PFI(9))]	= V(11),
+				[B(NI_PFI(10))]	= V(11),
+				[B(NI_PFI(11))]	= V(11),
+				[B(NI_PFI(12))]	= V(11),
+				[B(NI_PFI(13))]	= V(11),
+				[B(NI_PFI(14))]	= V(11),
+				[B(NI_PFI(15))]	= V(11),
+			},
+			[B(NI_AI_ExternalMUXClock)] = {
+				[B(NI_PFI(0))]	= V(12),
+				[B(NI_PFI(1))]	= V(12),
+				[B(NI_PFI(2))]	= V(12),
+				[B(NI_PFI(3))]	= V(12),
+				[B(NI_PFI(4))]	= V(12),
+				[B(NI_PFI(5))]	= V(12),
+				[B(NI_PFI(6))]	= V(12),
+				[B(NI_PFI(7))]	= V(12),
+				[B(NI_PFI(8))]	= V(12),
+				[B(NI_PFI(9))]	= V(12),
+				[B(NI_PFI(10))]	= V(12),
+				[B(NI_PFI(11))]	= V(12),
+				[B(NI_PFI(12))]	= V(12),
+				[B(NI_PFI(13))]	= V(12),
+				[B(NI_PFI(14))]	= V(12),
+				[B(NI_PFI(15))]	= V(12),
+			},
+			[B(NI_PFI_DO)] = {
+				[B(NI_PFI(0))]	= V(16),
+				[B(NI_PFI(1))]	= V(16),
+				[B(NI_PFI(2))]	= V(16),
+				[B(NI_PFI(3))]	= V(16),
+				[B(NI_PFI(4))]	= V(16),
+				[B(NI_PFI(5))]	= V(16),
+				[B(NI_PFI(6))]	= V(16),
+				[B(NI_PFI(7))]	= V(16),
+				[B(NI_PFI(8))]	= V(16),
+				[B(NI_PFI(9))]	= V(16),
+				[B(NI_PFI(10))]	= V(16),
+				[B(NI_PFI(11))]	= V(16),
+				[B(NI_PFI(12))]	= V(16),
+				[B(NI_PFI(13))]	= V(16),
+				[B(NI_PFI(14))]	= V(16),
+				[B(NI_PFI(15))]	= V(16),
+			},
+			[B(NI_CaseGround)] = {
+				[B(NI_AI_SampleClockTimebase)]	= V(0),
+				[B(NI_AO_SampleClockTimebase)]	= V(0),
+				[B(NI_DI_SampleClock)]	= V(0),
+				[B(NI_DO_SampleClock)]	= V(0),
+			},
+			[B(NI_RGOUT0)] = {
+				[B(TRIGGER_LINE(0))]	= V(7),
+				[B(TRIGGER_LINE(1))]	= V(7),
+				[B(TRIGGER_LINE(2))]	= V(7),
+				[B(TRIGGER_LINE(3))]	= V(7),
+				[B(TRIGGER_LINE(4))]	= V(7),
+				[B(TRIGGER_LINE(5))]	= V(7),
+				[B(TRIGGER_LINE(6))]	= V(7),
+				[B(TRIGGER_LINE(7))]	= V(7),
+			},
+		},
+	},
+};
-- 
1.9.1

